diff options
| author | Jyotsna Verma <jverma@codeaurora.org> | 2013-04-23 17:11:46 +0000 |
|---|---|---|
| committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-04-23 17:11:46 +0000 |
| commit | 3d7b39e7d4d3cef9f859f5965fbf959e251ee3ee (patch) | |
| tree | 469576de9b549ae3f6f0bef382ef4140a54dcdfa /test/CodeGen/Hexagon | |
| parent | 2e59a125fce4235beeb4e72cafbcbe62854ed77c (diff) | |
| download | llvm-3d7b39e7d4d3cef9f859f5965fbf959e251ee3ee.tar.gz llvm-3d7b39e7d4d3cef9f859f5965fbf959e251ee3ee.tar.bz2 llvm-3d7b39e7d4d3cef9f859f5965fbf959e251ee3ee.tar.xz | |
Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180120 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
| -rw-r--r-- | test/CodeGen/Hexagon/absimm.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/absimm.ll b/test/CodeGen/Hexagon/absimm.ll new file mode 100644 index 0000000000..b8f5edc264 --- /dev/null +++ b/test/CodeGen/Hexagon/absimm.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that we generate absolute addressing mode instructions +; with immediate value. + +define i32 @f1(i32 %i) nounwind { +; CHECK: memw(##786432){{ *}}={{ *}}r{{[0-9]+}} +entry: + store volatile i32 %i, i32* inttoptr (i32 786432 to i32*), align 262144 + ret i32 %i +} + +define i32* @f2(i32* nocapture %i) nounwind { +entry: +; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(##786432) + %0 = load volatile i32* inttoptr (i32 786432 to i32*), align 262144 + %1 = inttoptr i32 %0 to i32* + ret i32* %1 + } |