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authorTony Linthicum <tlinth@codeaurora.org>2011-12-12 21:14:40 +0000
committerTony Linthicum <tlinth@codeaurora.org>2011-12-12 21:14:40 +0000
commitb4b54153ad760c69a00a08531abef4ed434a5092 (patch)
tree5c767f5ad7f35af4cb8dc0228769e16d62c993e7 /test/CodeGen/Hexagon
parent127a669d09e21ddcd525f493c19dc399093bef35 (diff)
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Hexagon backend support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r--test/CodeGen/Hexagon/args.ll18
-rw-r--r--test/CodeGen/Hexagon/combine.ll17
-rw-r--r--test/CodeGen/Hexagon/dg.exp5
-rw-r--r--test/CodeGen/Hexagon/double.ll22
-rw-r--r--test/CodeGen/Hexagon/float.ll22
-rw-r--r--test/CodeGen/Hexagon/frame.ll23
-rw-r--r--test/CodeGen/Hexagon/mpy.ll19
-rw-r--r--test/CodeGen/Hexagon/static.ll20
-rw-r--r--test/CodeGen/Hexagon/struct_args.ll15
-rw-r--r--test/CodeGen/Hexagon/struct_args_large.ll16
-rw-r--r--test/CodeGen/Hexagon/vaddh.ll16
11 files changed, 193 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/args.ll b/test/CodeGen/Hexagon/args.ll
new file mode 100644
index 0000000000..4ebcaec308
--- /dev/null
+++ b/test/CodeGen/Hexagon/args.ll
@@ -0,0 +1,18 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: r[[T0:[0-9]+]] = #7
+; CHECK: memw(r29 + #0) = r[[T0]]
+; CHECK: r0 = #1
+; CHECK: r1 = #2
+; CHECK: r2 = #3
+; CHECK: r3 = #4
+; CHECK: r4 = #5
+; CHECK: r5 = #6
+
+
+define void @foo() nounwind {
+entry:
+ call void @bar(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7)
+ ret void
+}
+
+declare void @bar(i32, i32, i32, i32, i32, i32, i32)
diff --git a/test/CodeGen/Hexagon/combine.ll b/test/CodeGen/Hexagon/combine.ll
new file mode 100644
index 0000000000..721998596c
--- /dev/null
+++ b/test/CodeGen/Hexagon/combine.ll
@@ -0,0 +1,17 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: combine(r{{[0-9]+}}, r{{[0-9]+}})
+
+@j = external global i32
+@k = external global i64
+
+define void @foo() nounwind {
+entry:
+ %0 = load i32* @j, align 4
+ %1 = load i64* @k, align 8
+ %conv = trunc i64 %1 to i32
+ %2 = call i64 @llvm.hexagon.A2.combinew(i32 %0, i32 %conv)
+ store i64 %2, i64* @k, align 8
+ ret void
+}
+
+declare i64 @llvm.hexagon.A2.combinew(i32, i32) nounwind readnone
diff --git a/test/CodeGen/Hexagon/dg.exp b/test/CodeGen/Hexagon/dg.exp
new file mode 100644
index 0000000000..89f45e6723
--- /dev/null
+++ b/test/CodeGen/Hexagon/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Hexagon] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Hexagon/double.ll b/test/CodeGen/Hexagon/double.ll
new file mode 100644
index 0000000000..c3b6f378ec
--- /dev/null
+++ b/test/CodeGen/Hexagon/double.ll
@@ -0,0 +1,22 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: __hexagon_adddf3
+; CHECK: __hexagon_subdf3
+
+define void @foo(double* %acc, double %num, double %num2) nounwind {
+entry:
+ %acc.addr = alloca double*, align 4
+ %num.addr = alloca double, align 8
+ %num2.addr = alloca double, align 8
+ store double* %acc, double** %acc.addr, align 4
+ store double %num, double* %num.addr, align 8
+ store double %num2, double* %num2.addr, align 8
+ %0 = load double** %acc.addr, align 4
+ %1 = load double* %0
+ %2 = load double* %num.addr, align 8
+ %add = fadd double %1, %2
+ %3 = load double* %num2.addr, align 8
+ %sub = fsub double %add, %3
+ %4 = load double** %acc.addr, align 4
+ store double %sub, double* %4
+ ret void
+}
diff --git a/test/CodeGen/Hexagon/float.ll b/test/CodeGen/Hexagon/float.ll
new file mode 100644
index 0000000000..bec9f5852e
--- /dev/null
+++ b/test/CodeGen/Hexagon/float.ll
@@ -0,0 +1,22 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: __hexagon_addsf3
+; CHECK: __hexagon_subsf3
+
+define void @foo(float* %acc, float %num, float %num2) nounwind {
+entry:
+ %acc.addr = alloca float*, align 4
+ %num.addr = alloca float, align 4
+ %num2.addr = alloca float, align 4
+ store float* %acc, float** %acc.addr, align 4
+ store float %num, float* %num.addr, align 4
+ store float %num2, float* %num2.addr, align 4
+ %0 = load float** %acc.addr, align 4
+ %1 = load float* %0
+ %2 = load float* %num.addr, align 4
+ %add = fadd float %1, %2
+ %3 = load float* %num2.addr, align 4
+ %sub = fsub float %add, %3
+ %4 = load float** %acc.addr, align 4
+ store float %sub, float* %4
+ ret void
+}
diff --git a/test/CodeGen/Hexagon/frame.ll b/test/CodeGen/Hexagon/frame.ll
new file mode 100644
index 0000000000..dc87c732d6
--- /dev/null
+++ b/test/CodeGen/Hexagon/frame.ll
@@ -0,0 +1,23 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+
+@num = external global i32
+@acc = external global i32
+@num2 = external global i32
+
+; CHECK: allocframe
+; CHECK: dealloc_return
+
+define i32 @foo() nounwind {
+entry:
+ %i = alloca i32, align 4
+ %0 = load i32* @num, align 4
+ store i32 %0, i32* %i, align 4
+ %1 = load i32* %i, align 4
+ %2 = load i32* @acc, align 4
+ %mul = mul nsw i32 %1, %2
+ %3 = load i32* @num2, align 4
+ %add = add nsw i32 %mul, %3
+ store i32 %add, i32* %i, align 4
+ %4 = load i32* %i, align 4
+ ret i32 %4
+}
diff --git a/test/CodeGen/Hexagon/mpy.ll b/test/CodeGen/Hexagon/mpy.ll
new file mode 100644
index 0000000000..d5c5ae3453
--- /dev/null
+++ b/test/CodeGen/Hexagon/mpy.ll
@@ -0,0 +1,19 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: += mpyi
+
+define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind {
+entry:
+ %acc.addr = alloca i32, align 4
+ %num.addr = alloca i32, align 4
+ %num2.addr = alloca i32, align 4
+ store i32 %acc, i32* %acc.addr, align 4
+ store i32 %num, i32* %num.addr, align 4
+ store i32 %num2, i32* %num2.addr, align 4
+ %0 = load i32* %num.addr, align 4
+ %1 = load i32* %acc.addr, align 4
+ %mul = mul nsw i32 %0, %1
+ %2 = load i32* %num2.addr, align 4
+ %add = add nsw i32 %mul, %2
+ store i32 %add, i32* %num.addr, align 4
+ ret void
+}
diff --git a/test/CodeGen/Hexagon/static.ll b/test/CodeGen/Hexagon/static.ll
new file mode 100644
index 0000000000..843b7cbb7a
--- /dev/null
+++ b/test/CodeGen/Hexagon/static.ll
@@ -0,0 +1,20 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+
+@num = external global i32
+@acc = external global i32
+@val = external global i32
+
+; CHECK: CONST32(#acc)
+; CHECK: CONST32(#val)
+; CHECK: CONST32(#num)
+
+define void @foo() nounwind {
+entry:
+ %0 = load i32* @num, align 4
+ %1 = load i32* @acc, align 4
+ %mul = mul nsw i32 %0, %1
+ %2 = load i32* @val, align 4
+ %add = add nsw i32 %mul, %2
+ store i32 %add, i32* @num, align 4
+ ret void
+}
diff --git a/test/CodeGen/Hexagon/struct_args.ll b/test/CodeGen/Hexagon/struct_args.ll
new file mode 100644
index 0000000000..cc409db562
--- /dev/null
+++ b/test/CodeGen/Hexagon/struct_args.ll
@@ -0,0 +1,15 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: r1:0 = or(r{{[0-9]}}:{{[0-9]}}, r{{[0-9]}}:{{[0-9]}})
+
+%struct.small = type { i32, i32 }
+
+@s1 = common global %struct.small zeroinitializer, align 4
+
+define void @foo() nounwind {
+entry:
+ %0 = load i64* bitcast (%struct.small* @s1 to i64*), align 1
+ call void @bar(i64 %0)
+ ret void
+}
+
+declare void @bar(i64)
diff --git a/test/CodeGen/Hexagon/struct_args_large.ll b/test/CodeGen/Hexagon/struct_args_large.ll
new file mode 100644
index 0000000000..af099cdc43
--- /dev/null
+++ b/test/CodeGen/Hexagon/struct_args_large.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: r[[T0:[0-9]+]] = CONST32(#s2)
+; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0)
+; CHECK: memw(r29 + #0) = r[[T1]]
+
+%struct.large = type { i64, i64 }
+
+@s2 = common global %struct.large zeroinitializer, align 8
+
+define void @foo() nounwind {
+entry:
+ call void @bar(%struct.large* byval @s2)
+ ret void
+}
+
+declare void @bar(%struct.large* byval)
diff --git a/test/CodeGen/Hexagon/vaddh.ll b/test/CodeGen/Hexagon/vaddh.ll
new file mode 100644
index 0000000000..01d2041097
--- /dev/null
+++ b/test/CodeGen/Hexagon/vaddh.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}})
+
+@j = external global i32
+@k = external global i32
+
+define void @foo() nounwind {
+entry:
+ %0 = load i32* @j, align 4
+ %1 = load i32* @k, align 4
+ %2 = call i32 @llvm.hexagon.A2.svaddh(i32 %0, i32 %1)
+ store i32 %2, i32* @k, align 4
+ ret void
+}
+
+declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone