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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-11-07 17:13:35 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-11-07 17:13:35 +0000 |
commit | 123ed8f099b116449b8d9c284046863488390a47 (patch) | |
tree | b7587b179bc4bfaf8810a6bd2097541e17df071b /test/CodeGen/MSP430 | |
parent | 603fce9ebb5c293b73f83bc57974d59db6a80ea8 (diff) | |
download | llvm-123ed8f099b116449b8d9c284046863488390a47.tar.gz llvm-123ed8f099b116449b8d9c284046863488390a47.tar.bz2 llvm-123ed8f099b116449b8d9c284046863488390a47.tar.xz |
Initial support for addrmode handling. Tests by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MSP430')
-rw-r--r-- | test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/MSP430/AddrMode-bis-rx.ll | 74 | ||||
-rw-r--r-- | test/CodeGen/MSP430/AddrMode-bis-xr.ll | 81 | ||||
-rw-r--r-- | test/CodeGen/MSP430/AddrMode-mov-rx.ll | 67 | ||||
-rw-r--r-- | test/CodeGen/MSP430/AddrMode-mov-xr.ll | 67 | ||||
-rw-r--r-- | test/CodeGen/MSP430/inline-asm.ll | 3 |
6 files changed, 292 insertions, 2 deletions
diff --git a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll index cc574c7290..4d7d9b96c7 100644 --- a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll +++ b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8" target triple = "msp430-unknown-unknown" -@"\010x0021" = common global i8 0, align 1 ; <i8*> [#uses=2] +@"\010x0021" = external global i8, align 1 ; <i8*> [#uses=2] define zeroext i8 @foo(i8 zeroext %x) nounwind { entry: diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll new file mode 100644 index 0000000000..3340494f6b --- /dev/null +++ b/test/CodeGen/MSP430/AddrMode-bis-rx.ll @@ -0,0 +1,74 @@ +; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s +target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16" +target triple = "msp430-generic-generic" + +define i16 @am1(i16 %x, i16* %a) nounwind { + %1 = load i16* %a + %2 = or i16 %1,%x + ret i16 %2 +} +; CHECK: am1: +; CHECK: bis.w 0(r14), r15 + +@foo = external global i16 + +define i16 @am2(i16 %x) nounwind { + %1 = load i16* @foo + %2 = or i16 %1,%x + ret i16 %2 +} +; CHECK: am2: +; CHECK: bis.w &foo, r15 + +@bar = internal constant [2 x i8] [ i8 32, i8 64 ] + +define i8 @am3(i8 %x, i16 %n) nounwind { + %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n + %2 = load i8* %1 + %3 = or i8 %2,%x + ret i8 %3 +} +; CHECK: am3: +; CHECK: bis.b &bar(r14), r15 + +define i16 @am4(i16 %x) nounwind { + %1 = volatile load i16* inttoptr(i16 32 to i16*) + %2 = or i16 %1,%x + ret i16 %2 +} +; CHECK: am4: +; CHECK: bis.w &32, r15 + +define i16 @am5(i16 %x, i16* %a) nounwind { + %1 = getelementptr i16* %a, i16 2 + %2 = load i16* %1 + %3 = or i16 %2,%x + ret i16 %3 +} +; CHECK: am5: +; CHECK: bis.w 4(r14), r15 + +%S = type { i16, i16 } +@baz = common global %S zeroinitializer, align 1 + +define i16 @am6(i16 %x) nounwind { + %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1) + %2 = or i16 %1,%x + ret i16 %2 +} +; CHECK: am6: +; CHECK: bis.w &baz+2, r15 + +%T = type { i16, [2 x i8] } +@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] } + +define i8 @am7(i8 %x, i16 %n) nounwind { + %1 = getelementptr %T* @duh, i32 0, i32 1 + %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n + %3= load i8* %2 + %4 = or i8 %3,%x + ret i8 %4 +} +; CHECK: am7: +; CHECK: bis.b &duh+2(r14), r15 + diff --git a/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/test/CodeGen/MSP430/AddrMode-bis-xr.ll new file mode 100644 index 0000000000..ca79fb6d33 --- /dev/null +++ b/test/CodeGen/MSP430/AddrMode-bis-xr.ll @@ -0,0 +1,81 @@ +; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s +target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16" +target triple = "msp430-generic-generic" + +define void @am1(i16* %a, i16 %x) nounwind { + %1 = load i16* %a + %2 = or i16 %x, %1 + store i16 %2, i16* %a + ret void +} +; CHECK: am1: +; CHECK: bis.w r14, 0(r15) + +@foo = external global i16 + +define void @am2(i16 %x) nounwind { + %1 = load i16* @foo + %2 = or i16 %x, %1 + store i16 %2, i16* @foo + ret void +} +; CHECK: am2: +; CHECK: bis.w r15, &foo + +@bar = external global [2 x i8] + +define void @am3(i16 %i, i8 %x) nounwind { + %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i + %2 = load i8* %1 + %3 = or i8 %x, %2 + store i8 %3, i8* %1 + ret void +} +; CHECK: am3: +; CHECK: bis.b r14, &bar(r15) + +define void @am4(i16 %x) nounwind { + %1 = volatile load i16* inttoptr(i16 32 to i16*) + %2 = or i16 %x, %1 + volatile store i16 %2, i16* inttoptr(i16 32 to i16*) + ret void +} +; CHECK: am4: +; CHECK: bis.w r15, &32 + +define void @am5(i16* %a, i16 %x) readonly { + %1 = getelementptr inbounds i16* %a, i16 2 + %2 = load i16* %1 + %3 = or i16 %x, %2 + store i16 %3, i16* %1 + ret void +} +; CHECK: am5: +; CHECK: bis.w r14, 4(r15) + +%S = type { i16, i16 } +@baz = common global %S zeroinitializer + +define void @am6(i16 %x) nounwind { + %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1) + %2 = or i16 %x, %1 + store i16 %2, i16* getelementptr (%S* @baz, i32 0, i32 1) + ret void +} +; CHECK: am6: +; CHECK: bis.w r15, &baz+2 + +%T = type { i16, [2 x i8] } +@duh = external global %T + +define void @am7(i16 %n, i8 %x) nounwind { + %1 = getelementptr %T* @duh, i32 0, i32 1 + %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n + %3 = load i8* %2 + %4 = or i8 %x, %3 + store i8 %4, i8* %2 + ret void +} +; CHECK: am7: +; CHECK: bis.b r14, &duh+2(r15) + diff --git a/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/test/CodeGen/MSP430/AddrMode-mov-rx.ll new file mode 100644 index 0000000000..67cbb021c8 --- /dev/null +++ b/test/CodeGen/MSP430/AddrMode-mov-rx.ll @@ -0,0 +1,67 @@ +; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s +target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16" +target triple = "msp430-generic-generic" + +define i16 @am1(i16* %a) nounwind { + %1 = load i16* %a + ret i16 %1 +} +; CHECK: am1: +; CHECK: mov.w 0(r15), r15 + +@foo = external global i16 + +define i16 @am2() nounwind { + %1 = load i16* @foo + ret i16 %1 +} +; CHECK: am2: +; CHECK: mov.w &foo, r15 + +@bar = internal constant [2 x i8] [ i8 32, i8 64 ] + +define i8 @am3(i16 %n) nounwind { + %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n + %2 = load i8* %1 + ret i8 %2 +} +; CHECK: am3: +; CHECK: mov.b &bar(r15), r15 + +define i16 @am4() nounwind { + %1 = volatile load i16* inttoptr(i16 32 to i16*) + ret i16 %1 +} +; CHECK: am4: +; CHECK: mov.w &32, r15 + +define i16 @am5(i16* %a) nounwind { + %1 = getelementptr i16* %a, i16 2 + %2 = load i16* %1 + ret i16 %2 +} +; CHECK: am5: +; CHECK: mov.w 4(r15), r15 + +%S = type { i16, i16 } +@baz = common global %S zeroinitializer, align 1 + +define i16 @am6() nounwind { + %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1) + ret i16 %1 +} +; CHECK: am6: +; CHECK: mov.w &baz+2, r15 + +%T = type { i16, [2 x i8] } +@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] } + +define i8 @am7(i16 %n) nounwind { + %1 = getelementptr %T* @duh, i32 0, i32 1 + %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n + %3= load i8* %2 + ret i8 %3 +} +; CHECK: am7: +; CHECK: mov.b &duh+2(r15), r15 + diff --git a/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/test/CodeGen/MSP430/AddrMode-mov-xr.ll new file mode 100644 index 0000000000..b8155d3a55 --- /dev/null +++ b/test/CodeGen/MSP430/AddrMode-mov-xr.ll @@ -0,0 +1,67 @@ +; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s +target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16" +target triple = "msp430-generic-generic" + +define void @am1(i16* %a, i16 %b) nounwind { + store i16 %b, i16* %a + ret void +} +; CHECK: am1: +; CHECK: mov.w r14, 0(r15) + +@foo = external global i16 + +define void @am2(i16 %a) nounwind { + store i16 %a, i16* @foo + ret void +} +; CHECK: am2: +; CHECK: mov.w r15, &foo + +@bar = external global [2 x i8] + +define void @am3(i16 %i, i8 %a) nounwind { + %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i + store i8 %a, i8* %1 + ret void +} +; CHECK: am3: +; CHECK: mov.b r14, &bar(r15) + +define void @am4(i16 %a) nounwind { + volatile store i16 %a, i16* inttoptr(i16 32 to i16*) + ret void +} +; CHECK: am4: +; CHECK: mov.w r15, &32 + +define void @am5(i16* nocapture %p, i16 %a) nounwind readonly { + %1 = getelementptr inbounds i16* %p, i16 2 + store i16 %a, i16* %1 + ret void +} +; CHECK: am5: +; CHECK: mov.w r14, 4(r15) + +%S = type { i16, i16 } +@baz = common global %S zeroinitializer, align 1 + +define void @am6(i16 %a) nounwind { + store i16 %a, i16* getelementptr (%S* @baz, i32 0, i32 1) + ret void +} +; CHECK: am6: +; CHECK: mov.w r15, &baz+2 + +%T = type { i16, [2 x i8] } +@duh = external global %T + +define void @am7(i16 %n, i8 %a) nounwind { + %1 = getelementptr %T* @duh, i32 0, i32 1 + %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n + store i8 %a, i8* %2 + ret void +} +; CHECK: am7: +; CHECK: mov.b r14, &duh+2(r15) + diff --git a/test/CodeGen/MSP430/inline-asm.ll b/test/CodeGen/MSP430/inline-asm.ll index 2cc25a4835..0e7886a472 100644 --- a/test/CodeGen/MSP430/inline-asm.ll +++ b/test/CodeGen/MSP430/inline-asm.ll @@ -20,6 +20,7 @@ define void @immmem() nounwind { } define void @mem() nounwind { - call void asm sideeffect "bic\09$0,r2", "m"(i16* @foo) nounwind + %fooval = load i16* @foo + call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind ret void } |