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authorAnton Korobeynikov <asl@math.spbu.ru>2009-11-08 15:33:12 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-11-08 15:33:12 +0000
commitf0b47b7f6d417692bfda507e4b4a16c12e036ee9 (patch)
treedfb1b3c18571c95b76c622c4775435f53e562057 /test/CodeGen/MSP430
parent830fe7bc2dd35b77ecff6e8ae27e768e531536b6 (diff)
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Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MSP430')
-rw-r--r--test/CodeGen/MSP430/Inst16mr.ll10
-rw-r--r--test/CodeGen/MSP430/Inst16rm.ll10
-rw-r--r--test/CodeGen/MSP430/Inst16rr.ll8
-rw-r--r--test/CodeGen/MSP430/Inst8mr.ll10
-rw-r--r--test/CodeGen/MSP430/Inst8rm.ll10
-rw-r--r--test/CodeGen/MSP430/Inst8rr.ll8
6 files changed, 54 insertions, 2 deletions
diff --git a/test/CodeGen/MSP430/Inst16mr.ll b/test/CodeGen/MSP430/Inst16mr.ll
index 53334aa748..2613f01958 100644
--- a/test/CodeGen/MSP430/Inst16mr.ll
+++ b/test/CodeGen/MSP430/Inst16mr.ll
@@ -37,6 +37,16 @@ define void @bis(i16 %a) nounwind {
ret void
}
+define void @bic(i16 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r15, &foo
+ %1 = xor i16 %m, -1
+ %2 = load i16* @foo
+ %3 = and i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
define void @xor(i16 %a) nounwind {
; CHECK: xor:
; CHECK: xor.w r15, &foo
diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll
index d0cb0d19b9..02e89c7cac 100644
--- a/test/CodeGen/MSP430/Inst16rm.ll
+++ b/test/CodeGen/MSP430/Inst16rm.ll
@@ -19,7 +19,6 @@ define i16 @and(i16 %a) nounwind {
ret i16 %2
}
-
define i16 @bis(i16 %a) nounwind {
; CHECK: bis:
; CHECK: bis.w &foo, r15
@@ -28,6 +27,15 @@ define i16 @bis(i16 %a) nounwind {
ret i16 %2
}
+define i16 @bic(i16 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.w &foo, r15
+ %1 = load i16* @foo
+ %2 = xor i16 %1, -1
+ %3 = and i16 %a, %2
+ ret i16 %3
+}
+
define i16 @xor(i16 %a) nounwind {
; CHECK: xor:
; CHECK: xor.w &foo, r15
diff --git a/test/CodeGen/MSP430/Inst16rr.ll b/test/CodeGen/MSP430/Inst16rr.ll
index 6619c51823..2f1ba5b4f1 100644
--- a/test/CodeGen/MSP430/Inst16rr.ll
+++ b/test/CodeGen/MSP430/Inst16rr.ll
@@ -29,6 +29,14 @@ define i16 @bis(i16 %a, i16 %b) nounwind {
ret i16 %1
}
+define i16 @bic(i16 %a, i16 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r14, r15
+ %1 = xor i16 %b, -1
+ %2 = and i16 %a, %1
+ ret i16 %2
+}
+
define i16 @xor(i16 %a, i16 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w r14, r15
diff --git a/test/CodeGen/MSP430/Inst8mr.ll b/test/CodeGen/MSP430/Inst8mr.ll
index 04c681ef29..428d1fa38d 100644
--- a/test/CodeGen/MSP430/Inst8mr.ll
+++ b/test/CodeGen/MSP430/Inst8mr.ll
@@ -37,6 +37,16 @@ define void @bis(i8 %a) nounwind {
ret void
}
+define void @bic(i8 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r15, &foo
+ %1 = xor i8 %m, -1
+ %2 = load i8* @foo
+ %3 = and i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
define void @xor(i8 %a) nounwind {
; CHECK: xor:
; CHECK: xor.b r15, &foo
diff --git a/test/CodeGen/MSP430/Inst8rm.ll b/test/CodeGen/MSP430/Inst8rm.ll
index 62a5d4b908..c062f04c6b 100644
--- a/test/CodeGen/MSP430/Inst8rm.ll
+++ b/test/CodeGen/MSP430/Inst8rm.ll
@@ -19,7 +19,6 @@ define i8 @and(i8 %a) nounwind {
ret i8 %2
}
-
define i8 @bis(i8 %a) nounwind {
; CHECK: bis:
; CHECK: bis.b &foo, r15
@@ -28,6 +27,15 @@ define i8 @bis(i8 %a) nounwind {
ret i8 %2
}
+define i8 @bic(i8 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.b &foo, r15
+ %1 = load i8* @foo
+ %2 = xor i8 %1, -1
+ %3 = and i8 %a, %2
+ ret i8 %3
+}
+
define i8 @xor(i8 %a) nounwind {
; CHECK: xor:
; CHECK: xor.b &foo, r15
diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll
index 90ea94516a..74feaae4eb 100644
--- a/test/CodeGen/MSP430/Inst8rr.ll
+++ b/test/CodeGen/MSP430/Inst8rr.ll
@@ -29,6 +29,14 @@ define i8 @bis(i8 %a, i8 %b) nounwind {
ret i8 %1
}
+define i8 @bic(i8 %a, i8 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r14, r15
+ %1 = xor i8 %b, -1
+ %2 = and i8 %a, %1
+ ret i8 %2
+}
+
define i8 @xor(i8 %a, i8 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w r14, r15