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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-28 21:23:16 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-28 21:23:16 +0000 |
| commit | 21731d876c337a14d30c9b35e21141cc6fcf2e18 (patch) | |
| tree | 29c3e646d68a14ba34bd6e225783025500ab0e3d /test/CodeGen/Mips/dsp-r2.ll | |
| parent | 6eec6ffb9b4ffed8aa07f051fd35466c424a3d8c (diff) | |
| download | llvm-21731d876c337a14d30c9b35e21141cc6fcf2e18.tar.gz llvm-21731d876c337a14d30c9b35e21141cc6fcf2e18.tar.bz2 llvm-21731d876c337a14d30c9b35e21141cc6fcf2e18.tar.xz | |
MIPS DSP: add operands to make sure instruction strings are being matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164849 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/dsp-r2.ll')
| -rw-r--r-- | test/CodeGen/Mips/dsp-r2.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/Mips/dsp-r2.ll b/test/CodeGen/Mips/dsp-r2.ll index 4656f70636..631f9e43c2 100644 --- a/test/CodeGen/Mips/dsp-r2.ll +++ b/test/CodeGen/Mips/dsp-r2.ll @@ -539,7 +539,7 @@ declare i32 @llvm.mips.subqh.r.w(i32, i32) nounwind readnone define i32 @test__builtin_mips_append1(i32 %i0, i32 %a0, i32 %a1) nounwind readnone { entry: -; CHECK: append +; CHECK: append ${{[0-9]+}} %0 = tail call i32 @llvm.mips.append(i32 %a0, i32 %a1, i32 15) ret i32 %0 @@ -549,7 +549,7 @@ declare i32 @llvm.mips.append(i32, i32, i32) nounwind readnone define i32 @test__builtin_mips_balign1(i32 %i0, i32 %a0, i32 %a1) nounwind readnone { entry: -; CHECK: balign +; CHECK: balign ${{[0-9]+}} %0 = tail call i32 @llvm.mips.balign(i32 %a0, i32 %a1, i32 1) ret i32 %0 @@ -559,7 +559,7 @@ declare i32 @llvm.mips.balign(i32, i32, i32) nounwind readnone define i32 @test__builtin_mips_prepend1(i32 %i0, i32 %a0, i32 %a1) nounwind readnone { entry: -; CHECK: prepend +; CHECK: prepend ${{[0-9]+}} %0 = tail call i32 @llvm.mips.prepend(i32 %a0, i32 %a1, i32 15) ret i32 %0 |