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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 19:09:21 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 19:09:21 +0000 |
| commit | cb39aa05afd52f017869ce5399652223626da7b7 (patch) | |
| tree | f1df198527bb7ce4dc83f9fde5a33d1726c29c73 /test/CodeGen/Mips/dsp-r2.ll | |
| parent | 23bb38f034a7ff5566c2cea6b69645f4ca40307f (diff) | |
| download | llvm-cb39aa05afd52f017869ce5399652223626da7b7.tar.gz llvm-cb39aa05afd52f017869ce5399652223626da7b7.tar.bz2 llvm-cb39aa05afd52f017869ce5399652223626da7b7.tar.xz | |
MIPS DSP: ABSQ_S.PH instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164787 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/dsp-r2.ll')
| -rw-r--r-- | test/CodeGen/Mips/dsp-r2.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/dsp-r2.ll b/test/CodeGen/Mips/dsp-r2.ll index 7f91fad039..3566ad040e 100644 --- a/test/CodeGen/Mips/dsp-r2.ll +++ b/test/CodeGen/Mips/dsp-r2.ll @@ -323,3 +323,16 @@ entry: %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 ret { i32 } %.fca.0.insert } + +define { i32 } @test__builtin_mips_absq_s_qb1(i32 %i0, i32 %a0.coerce) nounwind { +entry: +; CHECK: absq_s.qb + + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = tail call <4 x i8> @llvm.mips.absq.s.qb(<4 x i8> %0) + %2 = bitcast <4 x i8> %1 to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +declare <4 x i8> @llvm.mips.absq.s.qb(<4 x i8>) nounwind |