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authorAkira Hatanaka <ahatanaka@mips.com>2012-03-01 22:12:30 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-03-01 22:12:30 +0000
commitdfa27aea12ae1d69a7e94ed5e6df6be1cc90d9e3 (patch)
treea4992878fc2d7e2979d50e6e295b0ab5b162fa4b /test/CodeGen/Mips/mips64-fp-indexed-ls.ll
parent97e910ecff5ed8b653a07fb1d014dab772931c0b (diff)
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Fix bugs which were introduced when support for base+index floating point loads
and stores was added. - SelectAddr should return false if Parent is an unaligned f32 load or store. - Only aligned load and store nodes should be matched to select reg+imm floating point instructions. - MIPS does not have support for f64 unaligned load or store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/mips64-fp-indexed-ls.ll')
-rw-r--r--test/CodeGen/Mips/mips64-fp-indexed-ls.ll43
1 files changed, 43 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/mips64-fp-indexed-ls.ll b/test/CodeGen/Mips/mips64-fp-indexed-ls.ll
index edeb285f92..09745fb8f6 100644
--- a/test/CodeGen/Mips/mips64-fp-indexed-ls.ll
+++ b/test/CodeGen/Mips/mips64-fp-indexed-ls.ll
@@ -1,10 +1,14 @@
; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 < %s | FileCheck %s
%struct.S = type <{ [4 x float] }>
+%struct.S2 = type <{ [4 x double] }>
+%struct.S3 = type <{ i8, float }>
@s = external global [4 x %struct.S]
@gf = external global float
@gd = external global double
+@s2 = external global [4 x %struct.S2]
+@s3 = external global %struct.S3
define float @foo0(float* nocapture %b, i32 %o) nounwind readonly {
entry:
@@ -65,3 +69,42 @@ entry:
ret void
}
+define double @foo6(i32 %b, i32 %c) nounwind readonly {
+entry:
+; CHECK: foo6
+; CHECK-NOT: ldxc1
+ %idxprom = zext i32 %c to i64
+ %idxprom1 = zext i32 %b to i64
+ %arrayidx2 = getelementptr inbounds [4 x %struct.S2]* @s2, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
+ %0 = load double* %arrayidx2, align 1
+ ret double %0
+}
+
+define void @foo7(i32 %b, i32 %c) nounwind {
+entry:
+; CHECK: foo7
+; CHECK-NOT: sdxc1
+ %0 = load double* @gd, align 8
+ %idxprom = zext i32 %c to i64
+ %idxprom1 = zext i32 %b to i64
+ %arrayidx2 = getelementptr inbounds [4 x %struct.S2]* @s2, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
+ store double %0, double* %arrayidx2, align 1
+ ret void
+}
+
+define float @foo8() nounwind readonly {
+entry:
+; CHECK: foo8
+; CHECK: luxc1
+ %0 = load float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1
+ ret float %0
+}
+
+define void @foo9(float %f) nounwind {
+entry:
+; CHECK: foo9
+; CHECK: suxc1
+ store float %f, float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1
+ ret void
+}
+