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authorDale Johannesen <dalej@apple.com>2010-02-16 23:25:23 +0000
committerDale Johannesen <dalej@apple.com>2010-02-16 23:25:23 +0000
commit4a12de72b050f9276d2027fc9f7a29fc30af5cec (patch)
treef15b38a225448aa7666e76625e0989083ee255ab /test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
parent53a2f60062500a9be3fd73b401712568e2bb01f5 (diff)
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Make g5 target explicit; scheduling affects register choice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96413 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll')
-rw-r--r--test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
index 0fd949d950..50a02781fd 100644
--- a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
+++ b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=ppc32 | FileCheck %s
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin10 -mcpu=g5 | FileCheck %s
; ModuleID = '<stdin>'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
target triple = "powerpc-apple-darwin10.0"