diff options
author | Tanya Lattner <tonic@nondot.org> | 2008-03-25 04:26:08 +0000 |
---|---|---|
committer | Tanya Lattner <tonic@nondot.org> | 2008-03-25 04:26:08 +0000 |
commit | 6f729d601c8a6a9710356aadb42dc8d0efa95bf2 (patch) | |
tree | e662b3ee5539d7594ab49eda3eae140424ce499d /test/CodeGen/PowerPC/and_sra.ll | |
parent | a2fb634defce316ec972aa6f3ca3a941b4656f5e (diff) | |
download | llvm-6f729d601c8a6a9710356aadb42dc8d0efa95bf2.tar.gz llvm-6f729d601c8a6a9710356aadb42dc8d0efa95bf2.tar.bz2 llvm-6f729d601c8a6a9710356aadb42dc8d0efa95bf2.tar.xz |
Byebye llvm-upgrade!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48762 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/and_sra.ll')
-rw-r--r-- | test/CodeGen/PowerPC/and_sra.ll | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/test/CodeGen/PowerPC/and_sra.ll b/test/CodeGen/PowerPC/and_sra.ll index abfa9f113a..c780605c97 100644 --- a/test/CodeGen/PowerPC/and_sra.ll +++ b/test/CodeGen/PowerPC/and_sra.ll @@ -1,26 +1,27 @@ ; Neither of these functions should contain algebraic right shifts -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi +; RUN: llvm-as < %s | llc -march=ppc32 | not grep srawi -int %test1(uint %mode.0.i.0) { - %tmp.79 = cast uint %mode.0.i.0 to int ; <sbyte> [#uses=1] - %tmp.80 = shr int %tmp.79, ubyte 15 ; <int> [#uses=1] - %tmp.81 = and int %tmp.80, 24 ; <int> [#uses=1] - ret int %tmp.81 +define i32 @test1(i32 %mode.0.i.0) { + %tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1] + %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1] + %tmp.81 = and i32 %tmp.80, 24 ; <i32> [#uses=1] + ret i32 %tmp.81 } -int %test2(uint %mode.0.i.0) { - %tmp.79 = cast uint %mode.0.i.0 to int ; <sbyte> [#uses=1] - %tmp.80 = shr int %tmp.79, ubyte 15 ; <int> [#uses=1] - %tmp.81 = shr uint %mode.0.i.0, ubyte 16 - %tmp.82 = cast uint %tmp.81 to int - %tmp.83 = and int %tmp.80, %tmp.82 ; <int> [#uses=1] - ret int %tmp.83 +define i32 @test2(i32 %mode.0.i.0) { + %tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1] + %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1] + %tmp.81 = lshr i32 %mode.0.i.0, 16 ; <i32> [#uses=1] + %tmp.82 = bitcast i32 %tmp.81 to i32 ; <i32> [#uses=1] + %tmp.83 = and i32 %tmp.80, %tmp.82 ; <i32> [#uses=1] + ret i32 %tmp.83 } -uint %test3(int %specbits.6.1) { - %tmp.2540 = shr int %specbits.6.1, ubyte 11 ; <int> [#uses=1] - %tmp.2541 = cast int %tmp.2540 to uint ; <uint> [#uses=1] - %tmp.2542 = shl uint %tmp.2541, ubyte 13 ; <uint> [#uses=1] - %tmp.2543 = and uint %tmp.2542, 8192 ; <uint> [#uses=1] - ret uint %tmp.2543 +define i32 @test3(i32 %specbits.6.1) { + %tmp.2540 = ashr i32 %specbits.6.1, 11 ; <i32> [#uses=1] + %tmp.2541 = bitcast i32 %tmp.2540 to i32 ; <i32> [#uses=1] + %tmp.2542 = shl i32 %tmp.2541, 13 ; <i32> [#uses=1] + %tmp.2543 = and i32 %tmp.2542, 8192 ; <i32> [#uses=1] + ret i32 %tmp.2543 } + |