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| author | Hal Finkel <hfinkel@anl.gov> | 2013-05-08 12:16:14 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-05-08 12:16:14 +0000 |
| commit | b45eb9fd275f857788cabb15ef8aabf0ff5907cc (patch) | |
| tree | c64b32d5f6cf2311ae557c2f267262062c12f103 /test/CodeGen/PowerPC/optcmp.ll | |
| parent | 3ea16db0be90892ab25a2f211d1a292be55f386c (diff) | |
| download | llvm-b45eb9fd275f857788cabb15ef8aabf0ff5907cc.tar.gz llvm-b45eb9fd275f857788cabb15ef8aabf0ff5907cc.tar.bz2 llvm-b45eb9fd275f857788cabb15ef8aabf0ff5907cc.tar.xz | |
PPCInstrInfo::optimizeCompareInstr should not optimize FP compares
The floating-point record forms on PPC don't set the condition register bits
based on a comparison with zero (like the integer record forms do), but rather
based on the exception status bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181423 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/optcmp.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/optcmp.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/PowerPC/optcmp.ll b/test/CodeGen/PowerPC/optcmp.ll index 1fce464dd3..523f329303 100644 --- a/test/CodeGen/PowerPC/optcmp.ll +++ b/test/CodeGen/PowerPC/optcmp.ll @@ -118,7 +118,7 @@ entry: ret double %cond ; CHECK: @food -; CHECK: fsub. 0, 1, 2 +; CHECK-NOT: fsub. 0, 1, 2 ; CHECK: stfd 0, 0(5) } @@ -131,7 +131,7 @@ entry: ret float %cond ; CHECK: @foof -; CHECK: fsubs. 0, 1, 2 +; CHECK-NOT: fsubs. 0, 1, 2 ; CHECK: stfs 0, 0(5) } |