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| author | Chris Lattner <sabre@nondot.org> | 2006-04-17 05:27:31 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-17 05:27:31 +0000 |
| commit | c3b5ad944cf208d122c0de90c106691adb4710a9 (patch) | |
| tree | 98ffdab96bd7f2c7f39360d5d9f9977725370013 /test/CodeGen/PowerPC/vec_perf_shuffle.ll | |
| parent | cffeb86169e3211766ea01ecb855f0ca2041fd73 (diff) | |
| download | llvm-c3b5ad944cf208d122c0de90c106691adb4710a9.tar.gz llvm-c3b5ad944cf208d122c0de90c106691adb4710a9.tar.bz2 llvm-c3b5ad944cf208d122c0de90c106691adb4710a9.tar.xz | |
new testcase, these shuffles can be implemented with discrete instructions,
and shouldn't be lowered to vperm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27747 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/vec_perf_shuffle.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/vec_perf_shuffle.ll | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/vec_perf_shuffle.ll b/test/CodeGen/PowerPC/vec_perf_shuffle.ll new file mode 100644 index 0000000000..4bae1c4a76 --- /dev/null +++ b/test/CodeGen/PowerPC/vec_perf_shuffle.ll @@ -0,0 +1,43 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 && +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep vperm + +<4 x float> %test_uu72(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + ; vmrglw + vsldoi + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint undef, uint undef, uint 7, uint 2> + ret <4 x float> %V3 +} + +<4 x float> %test_30u5(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint 0, uint undef, uint 5> + ret <4 x float> %V3 +} + +<4 x float> %test_3u73(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint undef, uint 7, uint 3> + ret <4 x float> %V3 +} + +<4 x float> %test_3774(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 3, uint 7, uint 7, uint 4> + ret <4 x float> %V3 +} + +<4 x float> %test_4450(<4 x float> *%P1, <4 x float> *%P2) { + %V1 = load <4 x float> *%P1 + %V2 = load <4 x float> *%P2 + %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, + <4 x uint> <uint 4, uint 4, uint 5, uint 0> + ret <4 x float> %V3 +} |