diff options
| author | Eli Friedman <eli.friedman@gmail.com> | 2009-06-07 01:07:55 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2009-06-07 01:07:55 +0000 |
| commit | 0da9975299aa68b34464cea4344102466743c28f (patch) | |
| tree | 3cddcad91f342b3ac2096038ec763e185843cf4e /test/CodeGen/PowerPC/vec_shift.ll | |
| parent | a9b9032df155fde9855307483f8e0b621f8730d7 (diff) | |
| download | llvm-0da9975299aa68b34464cea4344102466743c28f.tar.gz llvm-0da9975299aa68b34464cea4344102466743c28f.tar.bz2 llvm-0da9975299aa68b34464cea4344102466743c28f.tar.xz | |
PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73009 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/vec_shift.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/vec_shift.ll | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/vec_shift.ll b/test/CodeGen/PowerPC/vec_shift.ll new file mode 100644 index 0000000000..0cc699cee4 --- /dev/null +++ b/test/CodeGen/PowerPC/vec_shift.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 +; PR3628 + +define void @update(<4 x i32> %val, <4 x i32>* %dst) nounwind { +entry: + %shl = shl <4 x i32> %val, < i32 4, i32 3, i32 2, i32 1 > + %shr = ashr <4 x i32> %shl, < i32 1, i32 2, i32 3, i32 4 > + store <4 x i32> %shr, <4 x i32>* %dst + ret void +} |