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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-31 10:12:51 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-31 10:12:51 +0000 |
| commit | 8049ab15e4b638a07d6f230329945c2310eca27b (patch) | |
| tree | 89ddcf3d670a9c7f4fafe2db694222cabdd48485 /test/CodeGen/PowerPC | |
| parent | 9ad0f4907b3ba0916a8b6cdb95d298d2ddb7d405 (diff) | |
| download | llvm-8049ab15e4b638a07d6f230329945c2310eca27b.tar.gz llvm-8049ab15e4b638a07d6f230329945c2310eca27b.tar.bz2 llvm-8049ab15e4b638a07d6f230329945c2310eca27b.tar.xz | |
Add the PPC lfiwax instruction
This instruction is available on modern PPC64 CPUs, and is now used
to improve the SINT_TO_FP lowering (by eliminating the need for the
separate sign extension instruction and decreasing the amount of
needed stack space).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178446 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
| -rw-r--r-- | test/CodeGen/PowerPC/i32-to-float.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/i32-to-float.ll b/test/CodeGen/PowerPC/i32-to-float.ll index 0807717e50..bed940c5de 100644 --- a/test/CodeGen/PowerPC/i32-to-float.ll +++ b/test/CodeGen/PowerPC/i32-to-float.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -14,6 +15,13 @@ entry: ; CHECK: fcfid [[REG3:[0-9]+]], [[REG2]] ; CHECK: frsp 1, [[REG3]] ; CHECK: blr + +; CHECK-A2: @foo +; CHECK-A2: stw 3, +; CHECK-A2: lfiwax [[REG:[0-9]+]], +; CHECK-A2: fcfid [[REG2:[0-9]+]], [[REG]] +; CHECK-A2: frsp 1, [[REG2]] +; CHECK-A2: blr } define double @goo(i32 %a) nounwind { @@ -27,5 +35,11 @@ entry: ; CHECK: lfd [[REG2:[0-9]+]], ; CHECK: fcfid 1, [[REG2]] ; CHECK: blr + +; CHECK-A2: @goo +; CHECK-A2: stw 3, +; CHECK-A2: lfiwax [[REG:[0-9]+]], +; CHECK-A2: fcfid 1, [[REG]] +; CHECK-A2: blr } |