For PR1553:

Change the keywords for the zext and sext parameter attributes to be 
zeroext and signext so they don't conflict with the keywords for the
instructions of the same name. This gets around the ambiguity.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40069 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 10 insertions, 10 deletions

diff --git a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
index 0ea76c7633..ae853f67e2 100644
--- a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
+++ b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
@@ -4,7 +4,7 @@ target triple = "powerpc-apple-darwin8.8.0"
 ; RUN: llvm-as < %s | llc -march=ppc32 | grep {rlwinm r3, r3, 23, 30, 30}
 ; PR1473
 
-define i8 @foo(i16 zext  %a) zext  {
+define i8 @foo(i16 zeroext  %a) zeroext  {
         %tmp2 = lshr i16 %a, 10         ; <i16> [#uses=1]
         %tmp23 = trunc i16 %tmp2 to i8          ; <i8> [#uses=1]
         %tmp4 = shl i8 %tmp23, 1                ; <i8> [#uses=1]
diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll
index f85b3d82b7..eef8f51f7a 100644
--- a/test/CodeGen/PowerPC/and-elim.ll
+++ b/test/CodeGen/PowerPC/and-elim.ll
@@ -9,7 +9,7 @@ define void @test(i8* %P) {
 	ret void
 }
 
-define i16 @test2(i16 zext %crc) zext { 
+define i16 @test2(i16 zeroext %crc) zeroext { 
         ; No and's should be needed for the i16s here.
         %tmp.1 = lshr i16 %crc, 1
         %tmp.7 = xor i16 %tmp.1, 40961
diff --git a/test/CodeGen/PowerPC/and_sext.ll b/test/CodeGen/PowerPC/and_sext.ll
index ac277980bd..e0e498def0 100644
--- a/test/CodeGen/PowerPC/and_sext.ll
+++ b/test/CodeGen/PowerPC/and_sext.ll
@@ -9,7 +9,7 @@ define i32 @test1(i32 %mode.0.i.0) {
         ret i32 %tmp.81
 }
 
-define i16 @test2(i16 sext %X, i16 sext %x) sext {
+define i16 @test2(i16 signext %X, i16 signext %x) signext {
         %tmp = sext i16 %X to i32
         %tmp1 = sext i16 %x to i32
         %tmp2 = add i32 %tmp, %tmp1
@@ -20,7 +20,7 @@ define i16 @test2(i16 sext %X, i16 sext %x) sext {
         ret i16 %retval
 }
 
-define i16 @test3(i32 zext %X) sext {
+define i16 @test3(i32 zeroext %X) signext {
         %tmp1 = lshr i32 %X, 16
         %tmp2 = trunc i32 %tmp1 to i16
         ret i16 %tmp2
diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll
index e5120473a2..e211e86875 100644
--- a/test/CodeGen/PowerPC/small-arguments.ll
+++ b/test/CodeGen/PowerPC/small-arguments.ll
@@ -1,25 +1,25 @@
 ; RUN: llvm-as < %s | llc -march=ppc32 | not grep {extsh\\|rlwinm}
 
-declare i16 @foo() sext 
+declare i16 @foo() signext 
 
-define i32 @test1(i16 sext %X) {
+define i32 @test1(i16 signext %X) {
 	%Y = sext i16 %X to i32  ;; dead
 	ret i32 %Y
 }
 
-define i32 @test2(i16 zext %X) {
+define i32 @test2(i16 zeroext %X) {
 	%Y = sext i16 %X to i32
 	%Z = and i32 %Y, 65535      ;; dead
 	ret i32 %Z
 }
 
 define void @test3() {
-	%tmp.0 = call i16 @foo() sext            ;; no extsh!
+	%tmp.0 = call i16 @foo() signext            ;; no extsh!
 	%tmp.1 = icmp slt i16 %tmp.0, 1234
 	br i1 %tmp.1, label %then, label %UnifiedReturnBlock
 
 then:	
-	call i32 @test1(i16 0 sext)
+	call i32 @test1(i16 0 signext)
 	ret void
 UnifiedReturnBlock:
 	ret void
@@ -46,7 +46,7 @@ define i32 @test6(i32* %P) {
         ret i32 %tmp.2
 }
 
-define i16 @test7(float %a) zext {
+define i16 @test7(float %a) zeroext {
         %tmp.1 = fptoui float %a to i16
         ret i16 %tmp.1
 }