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| author | Vincent Lejeune <vljn@ovi.com> | 2013-09-04 19:53:46 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-09-04 19:53:46 +0000 |
| commit | bb25a01d232257b134f1f6a5810116cbb04b95b1 (patch) | |
| tree | c8372c60ee26e9325086cf932b4a20633f3f9487 /test/CodeGen/R600/literals.ll | |
| parent | b3df27d4402d8c8fc81d5acec812035360806cdc (diff) | |
| download | llvm-bb25a01d232257b134f1f6a5810116cbb04b95b1.tar.gz llvm-bb25a01d232257b134f1f6a5810116cbb04b95b1.tar.bz2 llvm-bb25a01d232257b134f1f6a5810116cbb04b95b1.tar.xz | |
R600: Non vector only instruction can be scheduled on trans unit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/literals.ll')
| -rw-r--r-- | test/CodeGen/R600/literals.ll | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/test/CodeGen/R600/literals.ll b/test/CodeGen/R600/literals.ll index 7a113f1a4c..e5bdbc43c2 100644 --- a/test/CodeGen/R600/literals.ll +++ b/test/CodeGen/R600/literals.ll @@ -7,7 +7,8 @@ ; ADD_INT literal.x KC0[2].Z, 5 ; CHECK: @i32_literal -; CHECK: ADD_INT * T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x +; CHECK: ADD_INT {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x +; CHECK-NEXT: LSHR ; CHECK-NEXT: 5 define void @i32_literal(i32 addrspace(1)* %out, i32 %in) { entry: @@ -23,7 +24,8 @@ entry: ; ADD literal.x KC0[2].Z, 5.0 ; CHECK: @float_literal -; CHECK: ADD * T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x +; CHECK: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x +; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.0 define void @float_literal(float addrspace(1)* %out, float %in) { entry: @@ -34,10 +36,10 @@ entry: ; Make sure inline literals are folded into REG_SEQUENCE instructions. ; CHECK: @inline_literal_reg_sequence -; CHECK: MOV T[[GPR:[0-9]]].X, 0.0 -; CHECK-NEXT: MOV T[[GPR]].Y, 0.0 -; CHECK-NEXT: MOV T[[GPR]].Z, 0.0 -; CHECK-NEXT: MOV * T[[GPR]].W, 0.0 +; CHECK: MOV {{\** *}}T[[GPR:[0-9]]].X, 0.0 +; CHECK-NEXT: MOV {{\** *}}T[[GPR]].Y, 0.0 +; CHECK-NEXT: MOV {{\** *}}T[[GPR]].Z, 0.0 +; CHECK-NEXT: MOV {{\** *}}T[[GPR]].W, 0.0 define void @inline_literal_reg_sequence(<4 x i32> addrspace(1)* %out) { entry: |