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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-18 20:09:29 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-18 20:09:29 +0000 |
| commit | 3e38856f04a01651819c6bc16fac4434a5d2b4c6 (patch) | |
| tree | 0a53471776dac44933dea3e3816270b1e5809b16 /test/CodeGen/R600/rotr.ll | |
| parent | 836c5133c66edecedeaa79448964b4c103f99271 (diff) | |
| download | llvm-3e38856f04a01651819c6bc16fac4434a5d2b4c6.tar.gz llvm-3e38856f04a01651819c6bc16fac4434a5d2b4c6.tar.bz2 llvm-3e38856f04a01651819c6bc16fac4434a5d2b4c6.tar.xz | |
R600/SI: Move patterns to match add / sub to scalar instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195034 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/rotr.ll')
| -rw-r--r-- | test/CodeGen/R600/rotr.ll | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/test/CodeGen/R600/rotr.ll b/test/CodeGen/R600/rotr.ll index 0a68d7e16e..edf7aeebea 100644 --- a/test/CodeGen/R600/rotr.ll +++ b/test/CodeGen/R600/rotr.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s -; R600-CHECK: @rotr +; R600-CHECK-LABEL: @rotr: ; R600-CHECK: BIT_ALIGN_INT -; SI-CHECK: @rotr +; SI-CHECK-LABEL: @rotr: ; SI-CHECK: V_ALIGNBIT_B32 define void @rotr(i32 addrspace(1)* %in, i32 %x, i32 %y) { entry: @@ -16,15 +16,16 @@ entry: ret void } -; R600-CHECK: @rotl +; R600-CHECK-LABEL: @rotl: ; R600-CHECK: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x ; R600-CHECK-NEXT: 32 ; R600-CHECK: BIT_ALIGN_INT {{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}} -; SI-CHECK: @rotl -; SI-CHECK: V_SUB_I32_e64 [[DST:v[0-9]+]], 32, {{[sv][0-9]+}} -; SI-CHECK: V_ALIGNBIT_B32 {{v[0-9]+, [sv][0-9]+, v[0-9]+}}, [[DST]] +; SI-CHECK-LABEL: @rotl: +; SI-CHECK: S_SUB_I32 [[SDST:s[0-9]+]], 32, {{[s][0-9]+}} +; SI-CHECK: V_MOV_B32_e32 [[VDST:v[0-9]+]], [[SDST]] +; SI-CHECK: V_ALIGNBIT_B32 {{v[0-9]+, [s][0-9]+, v[0-9]+}}, [[VDST]] define void @rotl(i32 addrspace(1)* %in, i32 %x, i32 %y) { entry: %0 = shl i32 %x, %y |