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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-11-13 23:36:50 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-11-13 23:36:50 +0000 |
| commit | a2b4eb6d15a13de257319ac6231b5ab622cd02b1 (patch) | |
| tree | 3147a7994db9c80cbaa22526fae0dbfdc780c212 /test/CodeGen/R600/unaligned-load-store.ll | |
| parent | b52bf6a3b31596a309f4b12884522e9b4a344654 (diff) | |
| download | llvm-a2b4eb6d15a13de257319ac6231b5ab622cd02b1.tar.gz llvm-a2b4eb6d15a13de257319ac6231b5ab622cd02b1.tar.bz2 llvm-a2b4eb6d15a13de257319ac6231b5ab622cd02b1.tar.xz | |
R600/SI: Add support for private address space load/store
Private address space is emulated using the register file with
MOVRELS and MOVRELD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/unaligned-load-store.ll')
| -rw-r--r-- | test/CodeGen/R600/unaligned-load-store.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/test/CodeGen/R600/unaligned-load-store.ll b/test/CodeGen/R600/unaligned-load-store.ll index 3d192d9a1a..2824ff8a88 100644 --- a/test/CodeGen/R600/unaligned-load-store.ll +++ b/test/CodeGen/R600/unaligned-load-store.ll @@ -1,8 +1,7 @@ ; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: @unaligned_load_store_i32: -; SI: V_ADD_I32_e64 [[REG:v[0-9]+]] -; DS_READ_U8 {{v[0-9]+}}, 0, [[REG]] +; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]] define void @unaligned_load_store_i32(i32 addrspace(3)* %p, i32 addrspace(3)* %r) nounwind { %v = load i32 addrspace(3)* %p, align 1 store i32 %v, i32 addrspace(3)* %r, align 1 @@ -10,8 +9,7 @@ define void @unaligned_load_store_i32(i32 addrspace(3)* %p, i32 addrspace(3)* %r } ; SI-LABEL: @unaligned_load_store_v4i32: -; SI: V_ADD_I32_e64 [[REG:v[0-9]+]] -; DS_READ_U8 {{v[0-9]+}}, 0, [[REG]] +; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]] define void @unaligned_load_store_v4i32(<4 x i32> addrspace(3)* %p, <4 x i32> addrspace(3)* %r) nounwind { %v = load <4 x i32> addrspace(3)* %p, align 1 store <4 x i32> %v, <4 x i32> addrspace(3)* %r, align 1 |