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authorTom Stellard <thomas.stellard@amd.com>2013-07-31 20:43:27 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-07-31 20:43:27 +0000
commit6b3f6a744a6d16c5d62dc3477186035e8a74a8e9 (patch)
tree1ace9471553c04326bc676bbc6b2cea18352a250 /test/CodeGen/R600/wrong-transalu-pos-fix.ll
parent5519dc9de88b36a2250db0faaf78c55f5e2c4d00 (diff)
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Revert "R600: Non vector only instruction can be scheduled on trans unit"
This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/wrong-transalu-pos-fix.ll')
-rw-r--r--test/CodeGen/R600/wrong-transalu-pos-fix.ll89
1 files changed, 0 insertions, 89 deletions
diff --git a/test/CodeGen/R600/wrong-transalu-pos-fix.ll b/test/CodeGen/R600/wrong-transalu-pos-fix.ll
deleted file mode 100644
index c158076f8c..0000000000
--- a/test/CodeGen/R600/wrong-transalu-pos-fix.ll
+++ /dev/null
@@ -1,89 +0,0 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-
-; We want all MULLO_INT inst to be last in their instruction group
-;CHECK: @fill3d
-;CHECK-NOT: MULLO_INT T[0-9]+
-
-; ModuleID = 'radeon'
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
-target triple = "r600--"
-
-; Function Attrs: nounwind
-define void @fill3d(i32 addrspace(1)* nocapture %out) #0 {
-entry:
- %x.i = tail call i32 @llvm.r600.read.global.size.x() #1
- %y.i18 = tail call i32 @llvm.r600.read.global.size.y() #1
- %mul = mul i32 %y.i18, %x.i
- %z.i17 = tail call i32 @llvm.r600.read.global.size.z() #1
- %mul3 = mul i32 %mul, %z.i17
- %x.i.i = tail call i32 @llvm.r600.read.tgid.x() #1
- %x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1
- %mul26.i = mul i32 %x.i12.i, %x.i.i
- %x.i4.i = tail call i32 @llvm.r600.read.tidig.x() #1
- %add.i16 = add i32 %x.i4.i, %mul26.i
- %mul7 = mul i32 %add.i16, %y.i18
- %y.i.i = tail call i32 @llvm.r600.read.tgid.y() #1
- %y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #1
- %mul30.i = mul i32 %y.i14.i, %y.i.i
- %y.i6.i = tail call i32 @llvm.r600.read.tidig.y() #1
- %add.i14 = add i32 %mul30.i, %mul7
- %mul819 = add i32 %add.i14, %y.i6.i
- %add = mul i32 %mul819, %z.i17
- %z.i.i = tail call i32 @llvm.r600.read.tgid.z() #1
- %z.i16.i = tail call i32 @llvm.r600.read.local.size.z() #1
- %mul33.i = mul i32 %z.i16.i, %z.i.i
- %z.i8.i = tail call i32 @llvm.r600.read.tidig.z() #1
- %add.i = add i32 %z.i8.i, %mul33.i
- %add13 = add i32 %add.i, %add
- %arrayidx = getelementptr inbounds i32 addrspace(1)* %out, i32 %add13
- store i32 %mul3, i32 addrspace(1)* %arrayidx, align 4, !tbaa !3
- ret void
-}
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tgid.x() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tgid.y() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tgid.z() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.local.size.x() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.local.size.y() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.local.size.z() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tidig.x() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tidig.y() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tidig.z() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.global.size.x() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.global.size.y() #1
-
-; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.global.size.z() #1
-
-attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
-attributes #1 = { nounwind readnone }
-
-!opencl.kernels = !{!0, !1, !2}
-
-!0 = metadata !{null}
-!1 = metadata !{null}
-!2 = metadata !{void (i32 addrspace(1)*)* @fill3d}
-!3 = metadata !{metadata !"int", metadata !4}
-!4 = metadata !{metadata !"omnipotent char", metadata !5}
-!5 = metadata !{metadata !"Simple C/C++ TBAA"}