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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-04-15 17:51:35 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-04-15 17:51:35 +0000 |
| commit | 9a256300f8f61937f5f7a148b9cb09936d103a97 (patch) | |
| tree | a4a19d533d9d7f04e888dd2a6c66bde5640a9bb0 /test/CodeGen/R600 | |
| parent | bf1efe642111043eeb7ccaf3da759f4d2d1e4647 (diff) | |
| download | llvm-9a256300f8f61937f5f7a148b9cb09936d103a97.tar.gz llvm-9a256300f8f61937f5f7a148b9cb09936d103a97.tar.bz2 llvm-9a256300f8f61937f5f7a148b9cb09936d103a97.tar.xz | |
R600/SI: Emit config values in register value pairs.
Instead of emitting config values in a predefined order, the code
emitter will now emit a 32-bit register index followed by the 32-bit
config value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600')
| -rw-r--r-- | test/CodeGen/R600/elf.ll | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/test/CodeGen/R600/elf.ll b/test/CodeGen/R600/elf.ll index 2383148c53..555ee3d5c3 100644 --- a/test/CodeGen/R600/elf.ll +++ b/test/CodeGen/R600/elf.ll @@ -1,7 +1,12 @@ -; RUN: llc < %s -march=r600 -mcpu=SI -filetype=obj | llvm-readobj -s - | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=SI -filetype=obj | llvm-readobj -s - | FileCheck --check-prefix=ELF-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=SI -o - | FileCheck --check-prefix=CONFIG-CHECK %s -; CHECK: Format: ELF32 -; CHECK: Name: .AMDGPU.config +; ELF-CHECK: Format: ELF32 +; ELF-CHECK: Name: .AMDGPU.config + +; CONFIG-CHECK: .section .AMDGPU.config +; CONFIG-CHECK-NEXT: .long 45096 +; CONFIG-CHECK-NEXT: .long 0 define void @test(i32 %p) { %i = add i32 %p, 2 %r = bitcast i32 %i to float |