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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-04-10 17:17:56 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-04-10 17:17:56 +0000 |
| commit | b187f8cd1ce98e40405ce8acf49997444646408a (patch) | |
| tree | cee5c11b1e4148a067f80ef55f71b5c19e4eaaf1 /test/CodeGen/R600 | |
| parent | 74adad6de8cf947257a53bb08364fa0f4f71b10e (diff) | |
| download | llvm-b187f8cd1ce98e40405ce8acf49997444646408a.tar.gz llvm-b187f8cd1ce98e40405ce8acf49997444646408a.tar.bz2 llvm-b187f8cd1ce98e40405ce8acf49997444646408a.tar.xz | |
R600/SI: Add pattern for AMDGPUurecip
21 more little piglits with radeonsi.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179186 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600')
| -rw-r--r-- | test/CodeGen/R600/urecip.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/R600/urecip.ll b/test/CodeGen/R600/urecip.ll new file mode 100644 index 0000000000..dad02dd76f --- /dev/null +++ b/test/CodeGen/R600/urecip.ll @@ -0,0 +1,12 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_RCP_IFLAG_F32_e32 + +define void @test(i32 %p, i32 %q) { + %i = udiv i32 %p, %q + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) |