Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.

This update was done with the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8

6 files changed, 22 insertions, 22 deletions

diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
index 4a5952736e..dc12b975a8 100644
--- a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
+++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
@@ -109,7 +109,7 @@ declare i32 @func(i32*)
 
 define i32 @restore_add(i32 %a, i32 %b) {
 entry:
-;CHECK:  restore_add:
+;CHECK-LABEL:  restore_add:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %o0, %i1, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -119,7 +119,7 @@ entry:
 
 define i32 @restore_add_imm(i32 %a) {
 entry:
-;CHECK:  restore_add_imm:
+;CHECK-LABEL:  restore_add_imm:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %o0, 20, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -129,7 +129,7 @@ entry:
 
 define i32 @restore_or(i32 %a) {
 entry:
-;CHECK:  restore_or:
+;CHECK-LABEL:  restore_or:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %g0, %o0, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -138,7 +138,7 @@ entry:
 
 define i32 @restore_or_imm(i32 %a) {
 entry:
-;CHECK:  restore_or_imm:
+;CHECK-LABEL:  restore_or_imm:
 ;CHECK:  or %o0, 20, %i0
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %g0, %g0, %g0
diff --git a/test/CodeGen/SPARC/64bit.ll b/test/CodeGen/SPARC/64bit.ll
index a5ea4d9067..f778f9dcf9 100644
--- a/test/CodeGen/SPARC/64bit.ll
+++ b/test/CodeGen/SPARC/64bit.ll
@@ -1,10 +1,10 @@
 ; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s
 ; RUN: llc < %s -march=sparcv9  | FileCheck %s -check-prefix=OPT
 
-; CHECK: ret2:
+; CHECK-LABEL: ret2:
 ; CHECK: or %g0, %i1, %i0
 
-; OPT: ret2:
+; OPT-LABEL: ret2:
 ; OPT: jmp %o7+8
 ; OPT: or %g0, %o1, %o0
 define i64 @ret2(i64 %a, i64 %b) {
@@ -14,7 +14,7 @@ define i64 @ret2(i64 %a, i64 %b) {
 ; CHECK: shl_imm
 ; CHECK: sllx %i0, 7, %i0
 
-; OPT: shl_imm:
+; OPT-LABEL: shl_imm:
 ; OPT: jmp %o7+8
 ; OPT: sllx %o0, 7, %o0
 define i64 @shl_imm(i64 %a) {
@@ -25,7 +25,7 @@ define i64 @shl_imm(i64 %a) {
 ; CHECK: sra_reg
 ; CHECK: srax %i0, %i1, %i0
 
-; OPT: sra_reg:
+; OPT-LABEL: sra_reg:
 ; OPT: jmp %o7+8
 ; OPT: srax %o0, %o1, %o0
 define i64 @sra_reg(i64 %a, i64 %b) {
@@ -271,11 +271,11 @@ define double @bitcast_f64_i64(i64 %x) {
   ret double %y
 }
 
-; CHECK: store_zero:
+; CHECK-LABEL: store_zero:
 ; CHECK: stx %g0, [%i0]
 ; CHECK: stx %g0, [%i1+8]
 
-; OPT:  store_zero:
+; OPT-LABEL:  store_zero:
 ; OPT:  stx %g0, [%o0]
 ; OPT:  stx %g0, [%o1+8]
 define i64 @store_zero(i64* nocapture %a, i64* nocapture %b) {
diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll
index 7004af9828..ba85825328 100644
--- a/test/CodeGen/SPARC/basictest.ll
+++ b/test/CodeGen/SPARC/basictest.ll
@@ -25,7 +25,7 @@ define i32 @test2(i32 %X, i32 %Y) {
 ; CHECK: xnor %o0, %o1, %o0
 }
 
-; CHECK: store_zero:
+; CHECK-LABEL: store_zero:
 ; CHECK: st   %g0, [%o0]
 ; CHECK: st   %g0, [%o1+4]
 define i32 @store_zero(i32* %a, i32* %b) {
diff --git a/test/CodeGen/SPARC/blockaddr.ll b/test/CodeGen/SPARC/blockaddr.ll
index a7e85fe2d4..c3d527013c 100644
--- a/test/CodeGen/SPARC/blockaddr.ll
+++ b/test/CodeGen/SPARC/blockaddr.ll
@@ -15,13 +15,13 @@ entry:
   ret i8* %x
 }
 
-; abs32: func_block_addr:
+; abs32-LABEL: func_block_addr:
 ; abs32: sethi %hi([[BLK:.+]]), [[R:%[gilo][0-7]]]
 ; abs32: call dummy
 ; abs32: add  [[R]], %lo([[BLK]]), %o0
 ; abs32: jmp %o0
 
-; abs44: func_block_addr:
+; abs44-LABEL: func_block_addr:
 ; abs44: sethi %h44([[BLK:.+]]), [[R:%[gilo][0-7]]]
 ; abs44: add [[R]], %m44([[BLK]]), [[R1:%[gilo][0-7]]]
 ; abs44: sllx [[R1]], 12, [[R2:%[gilo][0-7]]]
@@ -29,7 +29,7 @@ entry:
 ; abs44: add [[R2]], %l44([[BLK]]), %o0
 ; abs44: jmp %o0
 
-; abs64: func_block_addr:
+; abs64-LABEL: func_block_addr:
 ; abs64: sethi %hi([[BLK:.+]]), [[R:%[gilo][0-7]]]
 ; abs64: add [[R]], %lo([[BLK]]), [[R1:%[gilo][0-7]]]
 ; abs64: sethi %hh([[BLK]]), [[R2:%[gilo][0-7]]]
diff --git a/test/CodeGen/SPARC/float.ll b/test/CodeGen/SPARC/float.ll
index b35eb6c1d6..8dfd3715d0 100644
--- a/test/CodeGen/SPARC/float.ll
+++ b/test/CodeGen/SPARC/float.ll
@@ -7,7 +7,7 @@
 ; V8:     call get_double
 ; V8:     fnegs %f0, %f0
 
-; V8-UNOPT:     test_neg:
+; V8-UNOPT-LABEL:     test_neg:
 ; V8-UNOPT:     fnegs
 ; V8-UNOPT:     ! implicit-def
 ; V8-UNOPT:     fmovs {{.+}}, %f0
@@ -26,7 +26,7 @@ entry:
 ; V8-LABEL:     test_abs:
 ; V8:     fabss %f0, %f0
 
-; V8-UNOPT:     test_abs:
+; V8-UNOPT-LABEL:     test_abs:
 ; V8-UNOPT:     fabss
 ; V8-UNOPT:     ! implicit-def
 ; V8-UNOPT:     fmovs {{.+}}, %f0
diff --git a/test/CodeGen/SPARC/leafproc.ll b/test/CodeGen/SPARC/leafproc.ll
index a162df1b0c..0a7ae083d2 100644
--- a/test/CodeGen/SPARC/leafproc.ll
+++ b/test/CodeGen/SPARC/leafproc.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -march=sparc -disable-sparc-leaf-proc=0 < %s | FileCheck %s
 
-; CHECK:      func_nobody:
+; CHECK-LABEL:      func_nobody:
 ; CHECK:      jmp %o7+8
 ; CHECK-NEXT: nop
 define void @func_nobody() {
@@ -9,7 +9,7 @@ entry:
 }
 
 
-; CHECK:      return_int_const:
+; CHECK-LABEL:      return_int_const:
 ; CHECK:      jmp %o7+8
 ; CHECK-NEXT: or %g0, 1729, %o0
 define i32 @return_int_const() {
@@ -17,7 +17,7 @@ entry:
   ret i32 1729
 }
 
-; CHECK:      return_double_const:
+; CHECK-LABEL:      return_double_const:
 ; CHECK:      sethi
 ; CHECK:      jmp %o7+8
 ; CHECK-NEXT: ldd {{.*}}, %f0
@@ -27,7 +27,7 @@ entry:
   ret double 0.000000e+00
 }
 
-; CHECK:      leaf_proc_with_args:
+; CHECK-LABEL:      leaf_proc_with_args:
 ; CHECK:      add {{%o[0-1]}}, {{%o[0-1]}}, [[R:%[go][0-7]]]
 ; CHECK:      jmp %o7+8
 ; CHECK-NEXT: add [[R]], %o2, %o0
@@ -39,7 +39,7 @@ entry:
   ret i32 %1
 }
 
-; CHECK:     leaf_proc_with_args_in_stack:
+; CHECK-LABEL:     leaf_proc_with_args_in_stack:
 ; CHECK-DAG: ld [%sp+92], {{%[go][0-7]}}
 ; CHECK-DAG: ld [%sp+96], {{%[go][0-7]}}
 ; CHECK:     jmp %o7+8
@@ -56,7 +56,7 @@ entry:
   ret i32 %6
 }
 
-; CHECK:      leaf_proc_with_local_array:
+; CHECK-LABEL:      leaf_proc_with_local_array:
 ; CHECK:      add %sp, -104, %sp
 ; CHECK:      or %g0, 1, [[R1:%[go][0-7]]]
 ; CHECK:      st [[R1]], [%sp+96]