diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:22:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:22:01 +0000 |
| commit | 11db068721d44fd5f9b0c2a3a4c90f813d2eae9c (patch) | |
| tree | 7649fa37f8869eb5f872a3d73eb58587295b6cf1 /test/CodeGen/Thumb/barrier.ll | |
| parent | 3483acabf012b847b13b969ebd9ce5c4d16d9eb7 (diff) | |
| download | llvm-11db068721d44fd5f9b0c2a3a4c90f813d2eae9c.tar.gz llvm-11db068721d44fd5f9b0c2a3a4c90f813d2eae9c.tar.bz2 llvm-11db068721d44fd5f9b0c2a3a4c90f813d2eae9c.tar.xz | |
- Add subtarget feature -mattr=+db which determine whether an ARM cpu has the
memory and synchronization barrier dmb and dsb instructions.
- Change instruction names to something more sensible (matching name of actual
instructions).
- Added tests for memory barrier codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110785 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb/barrier.ll')
| -rw-r--r-- | test/CodeGen/Thumb/barrier.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll new file mode 100644 index 0000000000..44a3f46a18 --- /dev/null +++ b/test/CodeGen/Thumb/barrier.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s + +declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 ) + +define void @t1() { +; CHECK: t1: +; CHECK: blx {{_*}}sync_synchronize + call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true ) + ret void +} + +define void @t2() { +; CHECK: t2: +; CHECK: blx {{_*}}sync_synchronize + call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false ) + ret void +} |