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| author | Jim Grosbach <grosbach@apple.com> | 2011-06-30 22:10:46 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-06-30 22:10:46 +0000 |
| commit | 63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 (patch) | |
| tree | 9dd91095e265db1ecbefc5b968d2f0ee04a7fdc0 /test/CodeGen/Thumb2/thumb2-ifcvt1.ll | |
| parent | 2541c41f3e2af94585e14353a91f02facd65e415 (diff) | |
| download | llvm-63b46faeb8acae9b7e5f865b7417dc00b9b9dad3.tar.gz llvm-63b46faeb8acae9b7e5f865b7417dc00b9b9dad3.tar.bz2 llvm-63b46faeb8acae9b7e5f865b7417dc00b9b9dad3.tar.xz | |
Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/thumb2-ifcvt1.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-ifcvt1.ll | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll index d842d4d879..1533040671 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll @@ -70,8 +70,9 @@ entry: define void @t3(i32 %a, i32 %b) nounwind { entry: ; CHECK: t3: -; CHECK: it lt -; CHECK: poplt {r7, pc} +; CHECK: itt ge +; CHECK: movge r0, r1 +; CHECK: blge _foo %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock |