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authorAndrew Trick <atrick@apple.com>2011-04-23 03:55:32 +0000
committerAndrew Trick <atrick@apple.com>2011-04-23 03:55:32 +0000
commit1c3af779fc6b184204efd7e98dc16e475c251e7f (patch)
treed9ca1d20f7c3930939492236cac207ad0c5e0fc9 /test/CodeGen/Thumb2/thumb2-sub5.ll
parent1611bcd6acd685052eae9927f3ffbbfc917f1233 (diff)
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Thumb2 and ARM add/subtract with carry fixes.
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/thumb2-sub5.ll')
-rw-r--r--test/CodeGen/Thumb2/thumb2-sub5.ll7
1 files changed, 4 insertions, 3 deletions
diff --git a/test/CodeGen/Thumb2/thumb2-sub5.ll b/test/CodeGen/Thumb2/thumb2-sub5.ll
index c3b56bc09c..6edd789bee 100644
--- a/test/CodeGen/Thumb2/thumb2-sub5.ll
+++ b/test/CodeGen/Thumb2/thumb2-sub5.ll
@@ -1,9 +1,10 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+; RUN: llc < %s -march=thumb -mattr=+thumb2 -mattr=+32bit | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK: f1:
-; CHECK: subs r0, r0, r2
-; CHECK: sbcs r1, r3
+; CHECK: subs.w r0, r0, r2
+; To test dead_carry, +32bit prevents sbc conveting to 16-bit sbcs
+; CHECK: sbc.w r1, r1, r3
%tmp = sub i64 %a, %b
ret i64 %tmp
}