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author | Andrew Trick <atrick@apple.com> | 2013-06-24 09:13:20 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-06-24 09:13:20 +0000 |
commit | 98a9b72e8c56dc13a2617de84503a3d78352789c (patch) | |
tree | fd31bd17c5362627889925766aad73d8cdaddb32 /test/CodeGen/X86/2006-05-02-InstrSched1.ll | |
parent | 4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1 (diff) | |
download | llvm-98a9b72e8c56dc13a2617de84503a3d78352789c.tar.gz llvm-98a9b72e8c56dc13a2617de84503a3d78352789c.tar.bz2 llvm-98a9b72e8c56dc13a2617de84503a3d78352789c.tar.xz |
Temporarily enable MI-Sched on X86.
Sorry for the unit test churn. I'll try to make the change permanently
next time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184705 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2006-05-02-InstrSched1.ll')
-rw-r--r-- | test/CodeGen/X86/2006-05-02-InstrSched1.ll | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll index 0afddd8f87..69266dc4e4 100644 --- a/test/CodeGen/X86/2006-05-02-InstrSched1.ll +++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -1,7 +1,10 @@ ; REQUIRES: asserts ; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \ -; RUN: grep asm-printer | grep 14 +; RUN: grep asm-printer | grep 16 ; +; It's possible to schedule this in 14 instructions by avoiding +; callee-save registers, but the scheduler isn't currently that +; conervative with registers. @size20 = external global i32 ; <i32*> [#uses=1] @in5 = external global i8* ; <i8**> [#uses=1] @@ -21,4 +24,3 @@ define i32 @compare(i8* %a, i8* %b) nounwind { } declare i32 @memcmp(i8*, i8*, i32) - |