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authorEvan Cheng <evan.cheng@apple.com>2009-06-04 20:53:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-04 20:53:36 +0000
commit073e7e5807991a9f614569426fdd6536728c01ca (patch)
tree2b5cae4a8598788ed567177289029a4316ec67d7 /test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
parent550aacb978a8391f605c6ec1feca7d797415d38b (diff)
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RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72890 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll')
-rw-r--r--test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll48
1 files changed, 48 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
new file mode 100644
index 0000000000..fa90fa9426
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
@@ -0,0 +1,48 @@
+; RUN: llvm-as < %s | llc -march=x86
+
+ type { %struct.GAP } ; type %0
+ type { i16, i8, i8 } ; type %1
+ type { [2 x i32], [2 x i32] } ; type %2
+ type { %struct.rec* } ; type %3
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { %1 }
+ %struct.STYLE = type { %0, %0, i16, i16, i32 }
+ %struct.THIRD_UNION = type { %2 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
+
+define fastcc void @MinSize(%struct.rec* %x) nounwind {
+entry:
+ %tmp13 = load i8* undef, align 4 ; <i8> [#uses=3]
+ %tmp14 = zext i8 %tmp13 to i32 ; <i32> [#uses=2]
+ switch i32 %tmp14, label %bb1109 [
+ i32 42, label %bb246
+ ]
+
+bb246: ; preds = %entry, %entry
+ switch i8 %tmp13, label %bb249 [
+ i8 42, label %bb269
+ i8 44, label %bb269
+ ]
+
+bb249: ; preds = %bb246
+ %tmp3240 = icmp eq i8 %tmp13, 0 ; <i1> [#uses=1]
+ br i1 %tmp3240, label %bb974, label %bb269
+
+bb269:
+ %tmp3424 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 0, i32 0, i32 1 ; <%struct.rec**> [#uses=0]
+ unreachable
+
+bb974:
+ unreachable
+
+bb1109: ; preds = %entry
+ call fastcc void @Image(i32 %tmp14) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
+
+declare fastcc void @Image(i32) nounwind