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authorNadav Rotem <nrotem@apple.com>2012-08-18 02:43:28 +0000
committerNadav Rotem <nrotem@apple.com>2012-08-18 02:43:28 +0000
commitb5838689c6e204af3677df0ae10167f6070aba00 (patch)
treea29c2cc54eadc0f0527df47a04fa9b5d489e35ac /test/CodeGen/X86/2012-08-16-setcc.ll
parentfd45fa1503de725801be3db33c7e860298fc82a3 (diff)
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The X86 backend has a number of optimizations for SETCC nodes which use
arithmetic instructions. However, when small data types are used, a truncate node appears between the SETCC node and the arithmetic operation. This patch adds support for this pattern. Before: xorl %esi, %edi testb %dil, %dil setne %al ret After: xorb %dil, %sil setne %al ret rdar://12081007 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162160 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2012-08-16-setcc.ll')
-rw-r--r--test/CodeGen/X86/2012-08-16-setcc.ll45
1 files changed, 45 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2012-08-16-setcc.ll b/test/CodeGen/X86/2012-08-16-setcc.ll
new file mode 100644
index 0000000000..ed511567c3
--- /dev/null
+++ b/test/CodeGen/X86/2012-08-16-setcc.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+
+; rdar://12081007
+
+; CHECK: and_1:
+; CHECK: andb
+; CHECK-NEXT: cmovnel
+; CHECK: ret
+define i32 @and_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
+ %1 = and i8 %b, %a
+ %2 = icmp ne i8 %1, 0
+ %3 = select i1 %2, i32 %x, i32 0
+ ret i32 %3
+}
+
+; CHECK: and_2:
+; CHECK: andb
+; CHECK-NEXT: setne
+; CHECK: ret
+define zeroext i1 @and_2(i8 zeroext %a, i8 zeroext %b) {
+ %1 = and i8 %b, %a
+ %2 = icmp ne i8 %1, 0
+ ret i1 %2
+}
+
+; CHECK: xor_1:
+; CHECK: xorb
+; CHECK-NEXT: cmovnel
+; CHECK: ret
+define i32 @xor_1(i8 zeroext %a, i8 zeroext %b, i32 %x) {
+ %1 = xor i8 %b, %a
+ %2 = icmp ne i8 %1, 0
+ %3 = select i1 %2, i32 %x, i32 0
+ ret i32 %3
+}
+
+; CHECK: xor_2:
+; CHECK: xorb
+; CHECK-NEXT: setne
+; CHECK: ret
+define zeroext i1 @xor_2(i8 zeroext %a, i8 zeroext %b) {
+ %1 = xor i8 %b, %a
+ %2 = icmp ne i8 %1, 0
+ ret i1 %2
+}