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authorElena Demikhovsky <elena.demikhovsky@intel.com>2013-02-14 08:20:26 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2013-02-14 08:20:26 +0000
commit60b3e18d674489364b6448d376ff6666f106c1fc (patch)
tree3cfae09e7dc2cf0bf9964772a56bed66826954fc /test/CodeGen/X86/2013-02-12-ShuffleToZext.ll
parentc556fcc153a727945dbbe222a5b7c1dfce141a33 (diff)
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Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).
Added a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2013-02-12-ShuffleToZext.ll')
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diff --git a/test/CodeGen/X86/2013-02-12-ShuffleToZext.ll b/test/CodeGen/X86/2013-02-12-ShuffleToZext.ll
new file mode 100644
index 0000000000..614ccda5e2
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+++ b/test/CodeGen/X86/2013-02-12-ShuffleToZext.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -mtriple=x86_64-pc-win32 | FileCheck %s
+
+; CHECK: test
+; CHECK: vpmovzxwd
+; CHECK: vpmovzxwd
+define void @test(<4 x i64> %a, <4 x i16>* %buf) {
+ %ex1 = extractelement <4 x i64> %a, i32 0
+ %ex2 = extractelement <4 x i64> %a, i32 1
+ %x1 = bitcast i64 %ex1 to <4 x i16>
+ %x2 = bitcast i64 %ex2 to <4 x i16>
+ %Sh = shufflevector <4 x i16> %x1, <4 x i16> %x2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+ store <4 x i16> %Sh, <4 x i16>* %buf, align 1
+ ret void
+}