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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-15 01:34:59 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-15 01:34:59 +0000 |
| commit | 59d3ae6cdc4316ad338cd848251f33a236ccb36c (patch) | |
| tree | aec8d2396d4a436295845b109fb15b73279a2186 /test/CodeGen/X86/atomic-dagsched.ll | |
| parent | 2b7fef0ad4bfaaf9fd41cda5abda35aab701b598 (diff) | |
| download | llvm-59d3ae6cdc4316ad338cd848251f33a236ccb36c.tar.gz llvm-59d3ae6cdc4316ad338cd848251f33a236ccb36c.tar.bz2 llvm-59d3ae6cdc4316ad338cd848251f33a236ccb36c.tar.xz | |
Add addrspacecast instruction.
Patch by Michele Scandale!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/atomic-dagsched.ll')
| -rw-r--r-- | test/CodeGen/X86/atomic-dagsched.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/X86/atomic-dagsched.ll b/test/CodeGen/X86/atomic-dagsched.ll index 05e630be15..aa057577a0 100644 --- a/test/CodeGen/X86/atomic-dagsched.ll +++ b/test/CodeGen/X86/atomic-dagsched.ll @@ -34,8 +34,8 @@ dim_0_vector_pre_head.i: ; preds = %loop vector_kernel_entry.i: ; preds = %vector_kernel_entry.i, %dim_0_vector_pre_head.i %asr.iv9 = phi i8* [ %scevgep10, %vector_kernel_entry.i ], [ %asr.iv6, %dim_0_vector_pre_head.i ] %asr.iv = phi i64 [ %asr.iv.next, %vector_kernel_entry.i ], [ %vector.size.i, %dim_0_vector_pre_head.i ] - %8 = bitcast i8* %ptrtoarg4 to i32 addrspace(1)* - %asr.iv911 = bitcast i8* %asr.iv9 to <8 x i32> addrspace(1)* + %8 = addrspacecast i8* %ptrtoarg4 to i32 addrspace(1)* + %asr.iv911 = addrspacecast i8* %asr.iv9 to <8 x i32> addrspace(1)* %9 = load <8 x i32> addrspace(1)* %asr.iv911, align 4 %extract8vector_func.i = extractelement <8 x i32> %9, i32 0 %extract9vector_func.i = extractelement <8 x i32> %9, i32 1 @@ -73,8 +73,8 @@ dim_0_pre_head.i: ; preds = %scalarIf.i scalar_kernel_entry.i: ; preds = %scalar_kernel_entry.i, %dim_0_pre_head.i %asr.iv12 = phi i64 [ %asr.iv.next13, %scalar_kernel_entry.i ], [ %22, %dim_0_pre_head.i ] - %23 = bitcast i8* %asr.iv6 to i32 addrspace(1)* - %24 = bitcast i8* %ptrtoarg4 to i32 addrspace(1)* + %23 = addrspacecast i8* %asr.iv6 to i32 addrspace(1)* + %24 = addrspacecast i8* %ptrtoarg4 to i32 addrspace(1)* %scevgep16 = getelementptr i32 addrspace(1)* %23, i64 %asr.iv12 %25 = load i32 addrspace(1)* %scevgep16, align 4 %26 = atomicrmw min i32 addrspace(1)* %24, i32 %25 seq_cst |