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| author | Michael Liao <michael.liao@intel.com> | 2013-03-06 00:17:04 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-03-06 00:17:04 +0000 |
| commit | c537f79dcd9d91577b8e0a41c11f68b628d73af4 (patch) | |
| tree | 1703f4375e793e60d82d57c82002e10299a5493c /test/CodeGen/X86/atomic_op.ll | |
| parent | 603e874c64c2328cf29395e328bf77c1851068d2 (diff) | |
| download | llvm-c537f79dcd9d91577b8e0a41c11f68b628d73af4.tar.gz llvm-c537f79dcd9d91577b8e0a41c11f68b628d73af4.tar.bz2 llvm-c537f79dcd9d91577b8e0a41c11f68b628d73af4.tar.xz | |
Fix PR15355
- Clear 'mayStore' flag when loading from the atomic variable before the
spin loop
- Clear kill flag from one use to multiple use in registers forming the
address to that atomic variable
- don't use a physical register as live-in register in BB (neither entry
nor landing pad.) by copying it into virtual register
(patch by Cameron Zwarich)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176538 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/atomic_op.ll')
| -rw-r--r-- | test/CodeGen/X86/atomic_op.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index c5fa07d07d..a378d6e8d6 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+cmov | FileCheck %s +; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+cmov -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" |