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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-09-03 02:08:45 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-09-03 02:08:45 +0000 |
| commit | 95f1e2d6b52d55773bca16a5d3b7b283344dc47d (patch) | |
| tree | 9316aed747d143950b7d46c05921287a5f847229 /test/CodeGen/X86/avx-intrinsics-x86.ll | |
| parent | 4b0c9f3e732f671003dfd1ad75d1cd42e8775444 (diff) | |
| download | llvm-95f1e2d6b52d55773bca16a5d3b7b283344dc47d.tar.gz llvm-95f1e2d6b52d55773bca16a5d3b7b283344dc47d.tar.bz2 llvm-95f1e2d6b52d55773bca16a5d3b7b283344dc47d.tar.xz | |
AVX doesn't support mm operations neither its instrinsics.
The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112944 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/avx-intrinsics-x86.ll')
| -rw-r--r-- | test/CodeGen/X86/avx-intrinsics-x86.ll | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index 04246eabb4..a41bb050ce 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1715,14 +1715,6 @@ define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1) { declare i32 @llvm.x86.sse.ucomineq.ss(<4 x float>, <4 x float>) nounwind readnone -define <8 x i8> @test_x86_ssse3_pabs_b(<8 x i8> %a0) { - ; CHECK: vpabsb - %res = call <8 x i8> @llvm.x86.ssse3.pabs.b(<8 x i8> %a0) ; <<8 x i8>> [#uses=1] - ret <8 x i8> %res -} -declare <8 x i8> @llvm.x86.ssse3.pabs.b(<8 x i8>) nounwind readnone - - define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) { ; CHECK: vpabsb %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1] @@ -1731,14 +1723,6 @@ define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) { declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone -define <2 x i32> @test_x86_ssse3_pabs_d(<2 x i32> %a0) { - ; CHECK: vpabsd - %res = call <2 x i32> @llvm.x86.ssse3.pabs.d(<2 x i32> %a0) ; <<2 x i32>> [#uses=1] - ret <2 x i32> %res -} -declare <2 x i32> @llvm.x86.ssse3.pabs.d(<2 x i32>) nounwind readnone - - define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) { ; CHECK: vpabsd %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1] @@ -1747,14 +1731,6 @@ define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) { declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone -define <4 x i16> @test_x86_ssse3_pabs_w(<4 x i16> %a0) { - ; CHECK: vpabsw - %res = call <4 x i16> @llvm.x86.ssse3.pabs.w(<4 x i16> %a0) ; <<4 x i16>> [#uses=1] - ret <4 x i16> %res -} -declare <4 x i16> @llvm.x86.ssse3.pabs.w(<4 x i16>) nounwind readnone - - define <8 x i16> @test_x86_ssse3_pabs_w_128(<8 x i16> %a0) { ; CHECK: vpabsw %res = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] |