diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-25 18:12:18 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-25 18:12:18 +0000 |
| commit | 5984d2b31fe3c69e46d2b81439a8c3ef0bdf9a91 (patch) | |
| tree | 0c1299a629c7b9de2201f9d510748408d5c5af6a /test/CodeGen/X86/avx-shuffle.ll | |
| parent | 3769fe149bb47dfdaa8ac39b7a4c26cf98ec503e (diff) | |
| download | llvm-5984d2b31fe3c69e46d2b81439a8c3ef0bdf9a91.tar.gz llvm-5984d2b31fe3c69e46d2b81439a8c3ef0bdf9a91.tar.bz2 llvm-5984d2b31fe3c69e46d2b81439a8c3ef0bdf9a91.tar.xz | |
Run ProcessImplicitDefs on SSA form where it can be much simpler.
Implicitly defined virtual registers can simply have the <undef> bit set
on all uses, and copies can be turned into implicit defs recursively.
Physical registers are a bit trickier. We handle the common case where a
physreg def is used by a nearby instruction in the same basic block. For
more complicated cases, just leave the IMPLICIT_DEF instruction in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159149 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/avx-shuffle.ll')
| -rw-r--r-- | test/CodeGen/X86/avx-shuffle.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/X86/avx-shuffle.ll b/test/CodeGen/X86/avx-shuffle.ll index edfe4ab6c7..a88b0b9cad 100644 --- a/test/CodeGen/X86/avx-shuffle.ll +++ b/test/CodeGen/X86/avx-shuffle.ll @@ -90,8 +90,8 @@ define i32 @test9(<4 x i32> %a) nounwind { ; Extract a value which is the result of an undef mask. define i32 @test10(<4 x i32> %a) nounwind { ; CHECK: @test10 -; CHECK-NEXT: # -; CHECK-NEXT: ret +; CHECK-NOT: {{^[^#]*[a-z]}} +; CHECK: ret %b = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %r = extractelement <8 x i32> %b, i32 2 ret i32 %r |