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author | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-17 21:44:01 +0000 |
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committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-17 21:44:01 +0000 |
commit | ba05c91ed28e70505ac854dce976ac14f4c6e602 (patch) | |
tree | 3cfa1bc380528ef8a69e8b02e99337411e559291 /test/CodeGen/X86/avx-shuffle.ll | |
parent | 6220fea2a877e5cff559ed38e98c59a076ea9825 (diff) | |
download | llvm-ba05c91ed28e70505ac854dce976ac14f4c6e602.tar.gz llvm-ba05c91ed28e70505ac854dce976ac14f4c6e602.tar.bz2 llvm-ba05c91ed28e70505ac854dce976ac14f4c6e602.tar.xz |
Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/avx-shuffle.ll')
-rw-r--r-- | test/CodeGen/X86/avx-shuffle.ll | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/test/CodeGen/X86/avx-shuffle.ll b/test/CodeGen/X86/avx-shuffle.ll index 232fc78512..ee038ce21e 100644 --- a/test/CodeGen/X86/avx-shuffle.ll +++ b/test/CodeGen/X86/avx-shuffle.ll @@ -12,11 +12,11 @@ define <4 x float> @test1(<4 x float> %a) nounwind { ; rdar://10538417 define <3 x i64> @test2(<2 x i64> %v) nounwind readnone { ; CHECK: test2: -; CHECK: vxorpd -; CHECK: vperm2f128 +; CHECK: vinsertf128 %1 = shufflevector <2 x i64> %v, <2 x i64> %v, <3 x i32> <i32 0, i32 1, i32 undef> %2 = shufflevector <3 x i64> zeroinitializer, <3 x i64> %1, <3 x i32> <i32 3, i32 4, i32 2> ret <3 x i64> %2 +; CHECK: ret } define <4 x i64> @test3(<4 x i64> %a, <4 x i64> %b) nounwind { @@ -24,6 +24,7 @@ define <4 x i64> @test3(<4 x i64> %a, <4 x i64> %b) nounwind { ret <4 x i64> %c ; CHECK: test3: ; CHECK: vperm2f128 +; CHECK: ret } define <8 x float> @test4(float %a) nounwind { @@ -75,3 +76,23 @@ entry: ; CHECK: ret ret void } + +; Extract a value from a shufflevector.. +define i32 @test9(<4 x i32> %a) nounwind { +; CHECK: test9 +; CHECK: vpextrd + %b = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 undef, i32 4> + %r = extractelement <8 x i32> %b, i32 2 +; CHECK: ret + ret i32 %r +} + +; Extract a value which is the result of an undef mask. +define i32 @test10(<4 x i32> %a) nounwind { +; CHECK: @test10 +; CHECK-NEXT: # +; CHECK-NEXT: ret + %b = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %r = extractelement <8 x i32> %b, i32 2 + ret i32 %r +} |