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authorNadav Rotem <nadav.rotem@intel.com>2012-04-24 19:45:28 +0000
committerNadav Rotem <nadav.rotem@intel.com>2012-04-24 19:45:28 +0000
commit34a13bb412d5d8ac634efa887fad08a7bfb26b2b (patch)
treea4b8559900998fd5cdda4433f191d04b3e0eec01 /test/CodeGen/X86/avx2-shuffle.ll
parentddb1420e1752a354a2a18dfc37ecca7eef883beb (diff)
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Add a testcase for 155440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155475 91177308-0d34-0410-b5e6-96231b3b80d8
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diff --git a/test/CodeGen/X86/avx2-shuffle.ll b/test/CodeGen/X86/avx2-shuffle.ll
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+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
+
+; Make sure that we don't match this shuffle using the vpblendw instruction.
+; The mask for the vpblendw instruction needs to be identical for both halves
+; of the YMM.
+
+; CHECK: blendw1
+; CHECK-NOT: vpblendw
+; CHECK: ret
+define <16 x i16> @blendw1(<16 x i16> %a, <16 x i16> %b) nounwind alwaysinline {
+ %t = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 17, i32 18, i32 3, i32 20, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <16 x i16> %t
+}