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authorDan Gohman <gohman@apple.com>2009-06-04 22:49:04 +0000
committerDan Gohman <gohman@apple.com>2009-06-04 22:49:04 +0000
commitae3a0be92e33bc716722aa600983fc1535acb122 (patch)
tree768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/X86/coalescer-commute4.ll
parentd18e31ae17390d9c6f6cf93d18badf962452031d (diff)
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Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/coalescer-commute4.ll')
-rw-r--r--test/CodeGen/X86/coalescer-commute4.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/X86/coalescer-commute4.ll b/test/CodeGen/X86/coalescer-commute4.ll
index 7299aca3e0..9628f93e79 100644
--- a/test/CodeGen/X86/coalescer-commute4.ll
+++ b/test/CodeGen/X86/coalescer-commute4.ll
@@ -18,8 +18,8 @@ bb: ; preds = %bb, %bb.preheader
%tmp45 = sitofp i32 %tmp4 to float ; <float> [#uses=1]
%tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; <float*> [#uses=1]
%tmp9 = load float* %tmp8, align 4 ; <float> [#uses=1]
- %tmp11 = mul float %tmp9, %tmp45 ; <float> [#uses=1]
- %tmp14 = add float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2]
+ %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
+ %tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2]
%indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
%exitcond = icmp eq i32 %indvar.next, %umax ; <i1> [#uses=1]
br i1 %exitcond, label %bb23, label %bb