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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2010-12-21 21:41:44 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2010-12-21 21:41:44 +0000 |
| commit | 7d6fe13efc9bcb69d3479e32f8eace933c5bd2d5 (patch) | |
| tree | 8e3b48a1680e05cc29278670c62f1acff1a15c31 /test/CodeGen/X86/conditional-indecrement.ll | |
| parent | aad94aa4375d5ed43be728e03d91751c102ff958 (diff) | |
| download | llvm-7d6fe13efc9bcb69d3479e32f8eace933c5bd2d5.tar.gz llvm-7d6fe13efc9bcb69d3479e32f8eace933c5bd2d5.tar.bz2 llvm-7d6fe13efc9bcb69d3479e32f8eace933c5bd2d5.tar.xz | |
Add some x86 specific dagcombines for conditional increments.
(add Y, (sete X, 0)) -> cmp X, 1; adc 0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete X, 0), Y) -> cmp X, 1; sbb 0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y
for
unsigned foo(unsigned a, unsigned b) {
if (a == 0) b++;
return b;
}
we now get:
foo:
cmpl $1, %edi
movl %esi, %eax
adcl $0, %eax
ret
instead of:
foo:
testl %edi, %edi
sete %al
movzbl %al, %eax
addl %esi, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122364 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/conditional-indecrement.ll')
| -rw-r--r-- | test/CodeGen/X86/conditional-indecrement.ll | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/test/CodeGen/X86/conditional-indecrement.ll b/test/CodeGen/X86/conditional-indecrement.ll new file mode 100644 index 0000000000..a3a0c39905 --- /dev/null +++ b/test/CodeGen/X86/conditional-indecrement.ll @@ -0,0 +1,89 @@ +; RUN: llc -march=x86 < %s | FileCheck %s + +define i32 @test1(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test1: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test2(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test2: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test3(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test3: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test4(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test4: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test5(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test5: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} + +define i32 @test6(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test6: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test7(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test7: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test8(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test8: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} |