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| author | Owen Anderson <resistor@mac.com> | 2011-04-28 17:51:45 +0000 |
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| committer | Owen Anderson <resistor@mac.com> | 2011-04-28 17:51:45 +0000 |
| commit | 4cdcb4772d95b9e801a0f3cd43776cef3af3b530 (patch) | |
| tree | 221589eb68e02aa996e783243c7f21e5dc0c3aa1 /test/CodeGen/X86/fast-isel-x86-64.ll | |
| parent | d78bfbc6bb5342c2256bea0834613b02448ec74d (diff) | |
| download | llvm-4cdcb4772d95b9e801a0f3cd43776cef3af3b530.tar.gz llvm-4cdcb4772d95b9e801a0f3cd43776cef3af3b530.tar.bz2 llvm-4cdcb4772d95b9e801a0f3cd43776cef3af3b530.tar.xz | |
Fix a bug in tblgen that caused incorrect encodings on instructions that specified operands with "bit" instead of "bits<1>".
Unfortunately, my only testcase for this is fragile, and the ARM AsmParser can't round trip the instruction in question.
<rdar://problem/9345702>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130410 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/fast-isel-x86-64.ll')
0 files changed, 0 insertions, 0 deletions