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author | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-09-02 12:00:53 +0000 |
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committer | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-09-02 12:00:53 +0000 |
commit | 4629e0da6a19ea5883ecdfca841cacb3de657d73 (patch) | |
tree | 233d4045db0b73af1c63731e6abc736dc9426a70 /test/CodeGen/X86/h-register-addressing-64.ll | |
parent | b9edd20706d4c74111e6c7a65819641926132efa (diff) | |
download | llvm-4629e0da6a19ea5883ecdfca841cacb3de657d73.tar.gz llvm-4629e0da6a19ea5883ecdfca841cacb3de657d73.tar.bz2 llvm-4629e0da6a19ea5883ecdfca841cacb3de657d73.tar.xz |
FileCheck-ize three tests of llvm/test/CodeGen/X86/h-register(s).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/h-register-addressing-64.ll')
-rw-r--r-- | test/CodeGen/X86/h-register-addressing-64.ll | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/test/CodeGen/X86/h-register-addressing-64.ll b/test/CodeGen/X86/h-register-addressing-64.ll index 07cdc5df59..3f549d26c2 100644 --- a/test/CodeGen/X86/h-register-addressing-64.ll +++ b/test/CodeGen/X86/h-register-addressing-64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=-bmi | grep "movzbl %[abcd]h," | count 7 +; RUN: llc < %s -march=x86-64 -mattr=-bmi | FileCheck %s ; Use h-register extract and zero-extend. @@ -9,6 +9,9 @@ define double @foo8(double* nocapture inreg %p, i64 inreg %x) nounwind readonly %t3 = load double* %t2, align 8 ret double %t3 } +; CHECK: foo8: +; CHECK: movzbl %{{[abcd]}}h, %e + define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 8 %t1 = and i64 %t0, 255 @@ -16,6 +19,9 @@ define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load float* %t2, align 8 ret float %t3 } +; CHECK: foo4: +; CHECK: movzbl %{{[abcd]}}h, %e + define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 8 %t1 = and i64 %t0, 255 @@ -23,6 +29,9 @@ define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load i16* %t2, align 8 ret i16 %t3 } +; CHECK: foo2: +; CHECK: movzbl %{{[abcd]}}h, %e + define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 8 %t1 = and i64 %t0, 255 @@ -30,6 +39,9 @@ define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load i8* %t2, align 8 ret i8 %t3 } +; CHECK: foo1: +; CHECK: movzbl %{{[abcd]}}h, %e + define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 5 %t1 = and i64 %t0, 2040 @@ -37,6 +49,9 @@ define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load i8* %t2, align 8 ret i8 %t3 } +; CHECK: bar8: +; CHECK: movzbl %{{[abcd]}}h, %e + define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 6 %t1 = and i64 %t0, 1020 @@ -44,6 +59,9 @@ define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load i8* %t2, align 8 ret i8 %t3 } +; CHECK: bar4: +; CHECK: movzbl %{{[abcd]}}h, %e + define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t0 = lshr i64 %x, 7 %t1 = and i64 %t0, 510 @@ -51,3 +69,6 @@ define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly { %t3 = load i8* %t2, align 8 ret i8 %t3 } +; CHECK: bar2: +; CHECK: movzbl %{{[abcd]}}h, %e +; CHECK: ret |