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authorNAKAMURA Takumi <geek4civic@gmail.com>2011-03-16 13:52:51 +0000
committerNAKAMURA Takumi <geek4civic@gmail.com>2011-03-16 13:52:51 +0000
commit37947c6bad087605f07d73a0a418c3781e2eaaa9 (patch)
tree33a4752c9698fcfe35ffdf3032aa621851f35fe7 /test/CodeGen/X86/h-registers-0.ll
parentddbfbcf72e72d18b5aa149f37227961eac828030 (diff)
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test/CodeGen/X86: Add a pattern for Win64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127733 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/h-registers-0.ll')
-rw-r--r--test/CodeGen/X86/h-registers-0.ll26
1 files changed, 25 insertions, 1 deletions
diff --git a/test/CodeGen/X86/h-registers-0.ll b/test/CodeGen/X86/h-registers-0.ll
index e84bb9a34a..cdc75af92e 100644
--- a/test/CodeGen/X86/h-registers-0.ll
+++ b/test/CodeGen/X86/h-registers-0.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X86-64
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86-32
; Use h registers. On x86-64, codegen doesn't support general allocation
@@ -9,6 +10,12 @@ define void @bar64(i64 inreg %x, i8* inreg %p) nounwind {
; X86-64: shrq $8, %rdi
; X86-64: incb %dil
+; See FIXME: on regclass GR8.
+; It could be optimally transformed like; incb %ch; movb %ch, (%rdx)
+; WIN64: bar64:
+; WIN64: shrq $8, %rcx
+; WIN64: incb %cl
+
; X86-32: bar64:
; X86-32: incb %ah
%t0 = lshr i64 %x, 8
@@ -23,6 +30,10 @@ define void @bar32(i32 inreg %x, i8* inreg %p) nounwind {
; X86-64: shrl $8, %edi
; X86-64: incb %dil
+; WIN64: bar32:
+; WIN64: shrl $8, %ecx
+; WIN64: incb %cl
+
; X86-32: bar32:
; X86-32: incb %ah
%t0 = lshr i32 %x, 8
@@ -37,6 +48,10 @@ define void @bar16(i16 inreg %x, i8* inreg %p) nounwind {
; X86-64: shrl $8, %edi
; X86-64: incb %dil
+; WIN64: bar16:
+; WIN64: shrl $8, %ecx
+; WIN64: incb %cl
+
; X86-32: bar16:
; X86-32: incb %ah
%t0 = lshr i16 %x, 8
@@ -51,6 +66,9 @@ define i64 @qux64(i64 inreg %x) nounwind {
; X86-64: movq %rdi, %rax
; X86-64: movzbl %ah, %eax
+; WIN64: qux64:
+; WIN64: movzbl %ch, %eax
+
; X86-32: qux64:
; X86-32: movzbl %ah, %eax
%t0 = lshr i64 %x, 8
@@ -63,6 +81,9 @@ define i32 @qux32(i32 inreg %x) nounwind {
; X86-64: movl %edi, %eax
; X86-64: movzbl %ah, %eax
+; WIN64: qux32:
+; WIN64: movzbl %ch, %eax
+
; X86-32: qux32:
; X86-32: movzbl %ah, %eax
%t0 = lshr i32 %x, 8
@@ -75,6 +96,9 @@ define i16 @qux16(i16 inreg %x) nounwind {
; X86-64: movl %edi, %eax
; X86-64: movzbl %ah, %eax
+; WIN64: qux16:
+; WIN64: movzbl %ch, %eax
+
; X86-32: qux16:
; X86-32: movzbl %ah, %eax
%t0 = lshr i16 %x, 8