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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-11 19:35:44 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-11 19:35:44 +0000 |
| commit | 3830243b552fe87837f593a38d9623ee14b5261f (patch) | |
| tree | 978d9eab4e6005fb341d35480c525bfbbffd6546 /test/CodeGen/X86/inline-asm-modifier-q.ll | |
| parent | 644b118230739c647a61e658060be17650f1d7f8 (diff) | |
| download | llvm-3830243b552fe87837f593a38d9623ee14b5261f.tar.gz llvm-3830243b552fe87837f593a38d9623ee14b5261f.tar.bz2 llvm-3830243b552fe87837f593a38d9623ee14b5261f.tar.xz | |
Merging r205067:
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r205067 | ahatanaka | 2014-03-28 19:28:07 -0400 (Fri, 28 Mar 2014) | 7 lines
[x86] Fix printing of register operands with q modifier.
Emit 32-bit register names instead of 64-bit register names if the target does
not have 64-bit general purpose registers.
<rdar://problem/14653996>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@206055 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/inline-asm-modifier-q.ll')
| -rw-r--r-- | test/CodeGen/X86/inline-asm-modifier-q.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/X86/inline-asm-modifier-q.ll b/test/CodeGen/X86/inline-asm-modifier-q.ll new file mode 100644 index 0000000000..d20f06d290 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-modifier-q.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +; If the target does not have 64-bit integer registers, emit 32-bit register +; names. + +; CHECK: movq (%e{{[abcd]}}x, %ebx, 4) + +define void @q_modifier(i32* %p) { +entry: + tail call void asm sideeffect "movq (${0:q}, %ebx, 4), %mm0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p) + ret void +} |