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| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
| tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/X86/inline-asm-x-scalar.ll | |
| parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
| download | llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.gz llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.bz2 llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.xz | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/inline-asm-x-scalar.ll')
| -rw-r--r-- | test/CodeGen/X86/inline-asm-x-scalar.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll index d1bac0c3b2..aafbbd1fd0 100644 --- a/test/CodeGen/X86/inline-asm-x-scalar.ll +++ b/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -17,7 +17,7 @@ define void @test3() { define void @test4() { %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1] - %tmp4 = sub float %tmp1, 0x3810000000000000 ; <float> [#uses=1] + %tmp4 = fsub float %tmp1, 0x3810000000000000 ; <float> [#uses=1] tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 ) ret void } |