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| author | Jack Carter <jcarter@mips.com> | 2012-10-03 21:58:54 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2012-10-03 21:58:54 +0000 |
| commit | 42faefc11da326f10a4a52d72953318921d9e43d (patch) | |
| tree | ff18fecb1e0dc9ce2f855e4b809dfa9e34cff9ad /test/CodeGen/X86/ms-inline-asm.ll | |
| parent | 3c0962878cbc3bd5e3c482d458a242636fbbe140 (diff) | |
| download | llvm-42faefc11da326f10a4a52d72953318921d9e43d.tar.gz llvm-42faefc11da326f10a4a52d72953318921d9e43d.tar.bz2 llvm-42faefc11da326f10a4a52d72953318921d9e43d.tar.xz | |
This patch moves from using a hard coded number (4)
for the number of bytes in a particular instruction
to using
const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
Desc.getSize()
This is necessary with the advent of 16 bit instructions with
mips16 and micromips. It is also puts Mips in compliance with
the other targets for getting instruction size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165171 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/ms-inline-asm.ll')
0 files changed, 0 insertions, 0 deletions