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| author | Evan Cheng <evan.cheng@apple.com> | 2008-02-07 08:53:49 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-07 08:53:49 +0000 |
| commit | be3bf423315394f15f0c71afdaed26e5cfbcad4a (patch) | |
| tree | 781ebfc62c878741f13ed48ea718b559797a9948 /test/CodeGen/X86/pic_jumptable.ll | |
| parent | 15246738f2db3f63a20c1f2b9b19b08e21acffd9 (diff) | |
| download | llvm-be3bf423315394f15f0c71afdaed26e5cfbcad4a.tar.gz llvm-be3bf423315394f15f0c71afdaed26e5cfbcad4a.tar.bz2 llvm-be3bf423315394f15f0c71afdaed26e5cfbcad4a.tar.xz | |
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/pic_jumptable.ll')
| -rw-r--r-- | test/CodeGen/X86/pic_jumptable.ll | 65 |
1 files changed, 32 insertions, 33 deletions
diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll index d074514476..553021dc90 100644 --- a/test/CodeGen/X86/pic_jumptable.ll +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -1,36 +1,35 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text -; RUN: llvm-upgrade < %s | llvm-as | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea +; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text +; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea +; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | grep add | count 2 -implementation ; Functions: +declare void @_Z3bari(i32) -declare void %_Z3bari( int ) - -linkonce void %_Z3fooILi1EEvi(int %Y) { +define linkonce void @_Z3fooILi1EEvi(i32 %Y) { entry: - %Y_addr = alloca int ; <int*> [#uses=2] - "alloca point" = cast int 0 to int ; <int> [#uses=0] - store int %Y, int* %Y_addr - %tmp = load int* %Y_addr ; <int> [#uses=1] - switch int %tmp, label %bb10 [ - int 0, label %bb3 - int 1, label %bb - int 2, label %bb - int 3, label %bb - int 4, label %bb - int 5, label %bb - int 6, label %bb - int 7, label %bb - int 8, label %bb - int 9, label %bb - int 10, label %bb - int 12, label %bb1 - int 13, label %bb5 - int 14, label %bb6 - int 16, label %bb2 - int 17, label %bb4 - int 23, label %bb8 - int 27, label %bb7 - int 34, label %bb9 + %Y_addr = alloca i32 ; <i32*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %Y, i32* %Y_addr + %tmp = load i32* %Y_addr ; <i32> [#uses=1] + switch i32 %tmp, label %bb10 [ + i32 0, label %bb3 + i32 1, label %bb + i32 2, label %bb + i32 3, label %bb + i32 4, label %bb + i32 5, label %bb + i32 6, label %bb + i32 7, label %bb + i32 8, label %bb + i32 9, label %bb + i32 10, label %bb + i32 12, label %bb1 + i32 13, label %bb5 + i32 14, label %bb6 + i32 16, label %bb2 + i32 17, label %bb4 + i32 23, label %bb8 + i32 27, label %bb7 + i32 34, label %bb9 ] bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry @@ -40,7 +39,7 @@ bb1: ; preds = %bb, %entry br label %bb2 bb2: ; preds = %bb1, %entry - call void %_Z3bari( int 1 ) + call void @_Z3bari( i32 1 ) br label %bb11 bb3: ; preds = %entry @@ -53,7 +52,7 @@ bb5: ; preds = %bb4, %entry br label %bb6 bb6: ; preds = %bb5, %entry - call void %_Z3bari( int 2 ) + call void @_Z3bari( i32 2 ) br label %bb11 bb7: ; preds = %entry @@ -63,7 +62,7 @@ bb8: ; preds = %bb7, %entry br label %bb9 bb9: ; preds = %bb8, %entry - call void %_Z3bari( int 3 ) + call void @_Z3bari( i32 3 ) br label %bb11 bb10: ; preds = %entry |