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authorEvan Cheng <evan.cheng@apple.com>2012-07-17 19:40:05 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-07-17 19:40:05 +0000
commitafb24cecff868e76ce37cfbe8fe2463fd6ae6993 (patch)
tree9d7e732f33cdd79934576f9e9aa0b018c6b5fc45 /test/CodeGen/X86/shift-and.ll
parenta9e13ba3c8230073dd1157e4a17ef52906ac6cb8 (diff)
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Add test case for r160387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160389 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/shift-and.ll')
-rw-r--r--test/CodeGen/X86/shift-and.ll46
1 files changed, 44 insertions, 2 deletions
diff --git a/test/CodeGen/X86/shift-and.ll b/test/CodeGen/X86/shift-and.ll
index b747cc5580..1de915164f 100644
--- a/test/CodeGen/X86/shift-and.ll
+++ b/test/CodeGen/X86/shift-and.ll
@@ -1,13 +1,27 @@
-; RUN: llc < %s -march=x86 | grep and | count 2
-; RUN: llc < %s -march=x86-64 | not grep and
+; RUN: llc < %s -mtriple=i386-apple-macosx | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s --check-prefix=X64
define i32 @t1(i32 %t, i32 %val) nounwind {
+; X32: t1:
+; X32-NOT: andl
+; X32: shll
+
+; X64: t1:
+; X64-NOT: andl
+; X64: shll
%shamt = and i32 %t, 31
%res = shl i32 %val, %shamt
ret i32 %res
}
define i32 @t2(i32 %t, i32 %val) nounwind {
+; X32: t2:
+; X32-NOT: andl
+; X32: shll
+
+; X64: t2:
+; X64-NOT: andl
+; X64: shll
%shamt = and i32 %t, 63
%res = shl i32 %val, %shamt
ret i32 %res
@@ -16,6 +30,13 @@ define i32 @t2(i32 %t, i32 %val) nounwind {
@X = internal global i16 0
define void @t3(i16 %t) nounwind {
+; X32: t3:
+; X32-NOT: andl
+; X32: sarw
+
+; X64: t3:
+; X64-NOT: andl
+; X64: sarw
%shamt = and i16 %t, 31
%tmp = load i16* @X
%tmp1 = ashr i16 %tmp, %shamt
@@ -24,13 +45,34 @@ define void @t3(i16 %t) nounwind {
}
define i64 @t4(i64 %t, i64 %val) nounwind {
+; X64: t4:
+; X64-NOT: and
+; X64: shrq
%shamt = and i64 %t, 63
%res = lshr i64 %val, %shamt
ret i64 %res
}
define i64 @t5(i64 %t, i64 %val) nounwind {
+; X64: t5:
+; X64-NOT: and
+; X64: shrq
%shamt = and i64 %t, 191
%res = lshr i64 %val, %shamt
ret i64 %res
}
+
+
+; rdar://11866926
+define i64 @t6(i64 %key, i64* nocapture %val) nounwind {
+entry:
+; X64: t6:
+; X64-NOT: movabsq
+; X64: decq
+; X64: andq
+ %shr = lshr i64 %key, 3
+ %0 = load i64* %val, align 8
+ %sub = add i64 %0, 2305843009213693951
+ %and = and i64 %sub, %shr
+ ret i64 %and
+}