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| author | Dan Gohman <gohman@apple.com> | 2007-07-18 20:23:34 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-07-18 20:23:34 +0000 |
| commit | 4106f3714e8fc2d3561a3e64244d560b4cc41837 (patch) | |
| tree | 25298e24a4db0c07f25c3897491fd2ace9edb362 /test/CodeGen/X86/sse-align-10.ll | |
| parent | b54b315251848ddab87ef9f2aa9aac92e3c68357 (diff) | |
| download | llvm-4106f3714e8fc2d3561a3e64244d560b4cc41837.tar.gz llvm-4106f3714e8fc2d3561a3e64244d560b4cc41837.tar.bz2 llvm-4106f3714e8fc2d3561a3e64244d560b4cc41837.tar.xz | |
Implement initial memory alignment awareness for SSE instructions. Vector loads
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/sse-align-10.ll')
| -rw-r--r-- | test/CodeGen/X86/sse-align-10.ll | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/test/CodeGen/X86/sse-align-10.ll b/test/CodeGen/X86/sse-align-10.ll new file mode 100644 index 0000000000..e94c090794 --- /dev/null +++ b/test/CodeGen/X86/sse-align-10.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1 + +define <2 x i64> @bar(<2 x i64>* %p) +{ + %t = load <2 x i64>* %p, align 8 + ret <2 x i64> %t +} |