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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-05-04 23:54:51 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-05-04 23:54:51 +0000 |
| commit | 61396aebee310b96b0c2a9cb629665c2f23d45f5 (patch) | |
| tree | 99fbd7c9b7c1fae9241bbb870d5e810623d280c2 /test/CodeGen/X86/sse3.ll | |
| parent | 3f58a513e19fba487cb8416492456e9ade7db32e (diff) | |
| download | llvm-61396aebee310b96b0c2a9cb629665c2f23d45f5.tar.gz llvm-61396aebee310b96b0c2a9cb629665c2f23d45f5.tar.bz2 llvm-61396aebee310b96b0c2a9cb629665c2f23d45f5.tar.xz | |
Fix a batch of x86 tests to be coalescer independent.
Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/sse3.ll')
| -rw-r--r-- | test/CodeGen/X86/sse3.ll | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index 8e72f13342..8c2e58d503 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -62,11 +62,10 @@ define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > ret <8 x i16> %tmp ; X64: t4: -; X64: pextrw $7, %xmm0, %eax -; X64: pshufhw $100, %xmm0, %xmm1 -; X64: pinsrw $1, %eax, %xmm1 -; X64: pextrw $1, %xmm0, %eax -; X64: movdqa %xmm1, %xmm0 +; X64: pextrw $7, [[XMM0:%xmm[0-9]+]], %eax +; X64: pshufhw $100, [[XMM0]], [[XMM1:%xmm[0-9]+]] +; X64: pinsrw $1, %eax, [[XMM1]] +; X64: pextrw $1, [[XMM0]], %eax ; X64: pinsrw $4, %eax, %xmm0 ; X64: ret } @@ -251,13 +250,13 @@ entry: %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > ret <16 x i8> %tmp9 ; X64: t16: -; X64: pinsrw $0, %eax, %xmm1 -; X64: pextrw $8, %xmm0, %eax -; X64: pinsrw $1, %eax, %xmm1 -; X64: pextrw $1, %xmm1, %ecx -; X64: movd %xmm1, %edx -; X64: pinsrw $0, %edx, %xmm1 -; X64: pinsrw $1, %eax, %xmm0 +; X64: pinsrw $0, %eax, [[X1:%xmm[0-9]+]] +; X64: pextrw $8, [[X0:%xmm[0-9]+]], %eax +; X64: pinsrw $1, %eax, [[X1]] +; X64: pextrw $1, [[X1]], %ecx +; X64: movd [[X1]], %edx +; X64: pinsrw $0, %edx, %xmm +; X64: pinsrw $1, %eax, %xmm ; X64: ret } |