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authorEvan Cheng <evan.cheng@apple.com>2011-02-10 02:20:55 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-02-10 02:20:55 +0000
commit4d96c638af0458f4de637998da942a5e166d6ea5 (patch)
treef7a1bc561f4cb31b02eea47391bfdcb6a295bae7 /test/CodeGen/X86/twoaddr-lea.ll
parent6793c49bb4b7d20532e530404740422036d84788 (diff)
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After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125259 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/twoaddr-lea.ll')
-rw-r--r--test/CodeGen/X86/twoaddr-lea.ll32
1 files changed, 22 insertions, 10 deletions
diff --git a/test/CodeGen/X86/twoaddr-lea.ll b/test/CodeGen/X86/twoaddr-lea.ll
index a245ed7caa..ec16dfe172 100644
--- a/test/CodeGen/X86/twoaddr-lea.ll
+++ b/test/CodeGen/X86/twoaddr-lea.ll
@@ -5,20 +5,32 @@
;; allocator turns the shift into an LEA. This also occurs for ADD.
; Check that the shift gets turned into an LEA.
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
-; RUN: not grep {mov E.X, E.X}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-@G = external global i32 ; <i32*> [#uses=3]
+@G = external global i32
-define i32 @test1(i32 %X, i32 %Y) {
- %Z = add i32 %X, %Y ; <i32> [#uses=1]
- volatile store i32 %Y, i32* @G
+define i32 @test1(i32 %X) nounwind {
+; CHECK: test1:
+; CHECK-NOT: mov
+; CHECK: leal 1(%rdi)
+ %Z = add i32 %X, 1
volatile store i32 %Z, i32* @G
ret i32 %X
}
-define i32 @test2(i32 %X) {
- %Z = add i32 %X, 1 ; <i32> [#uses=1]
- volatile store i32 %Z, i32* @G
- ret i32 %X
+; rdar://8977508
+; The second add should not be transformed to leal nor should it be
+; commutted (which would require inserting a copy).
+define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
+entry:
+; CHECK: test2:
+; CHECK: leal
+; CHECK-NOT: leal
+; CHECK-NOT: mov
+; CHECK-NEXT: addl
+; CHECK-NEXT: ret
+ %add = add i32 %b, %a
+ %add3 = add i32 %add, %c
+ %add5 = add i32 %add3, %d
+ ret i32 %add5
}