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authorDan Gohman <gohman@apple.com>2010-01-04 20:53:54 +0000
committerDan Gohman <gohman@apple.com>2010-01-04 20:53:54 +0000
commitb75e8642a608c34a70575dd16574847d8f0c1afb (patch)
treeccf2f8d4789ccee9071fef93fc0456575ac90e1d /test/CodeGen/X86/twoaddr-lea.ll
parent3cc4a307a8f687dcf33ef947c792b6ede406db0d (diff)
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Add some tests and update an existing test to reflect recent
x86 isel peeps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/twoaddr-lea.ll')
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diff --git a/test/CodeGen/X86/twoaddr-lea.ll b/test/CodeGen/X86/twoaddr-lea.ll
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+;; X's live range extends beyond the shift, so the register allocator
+;; cannot coalesce it with Y. Because of this, a copy needs to be
+;; emitted before the shift to save the register value before it is
+;; clobbered. However, this copy is not needed if the register
+;; allocator turns the shift into an LEA. This also occurs for ADD.
+
+; Check that the shift gets turned into an LEA.
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: not grep {mov E.X, E.X}
+
+@G = external global i32 ; <i32*> [#uses=3]
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %Z = add i32 %X, %Y ; <i32> [#uses=1]
+ volatile store i32 %Y, i32* @G
+ volatile store i32 %Z, i32* @G
+ ret i32 %X
+}
+
+define i32 @test2(i32 %X) {
+ %Z = add i32 %X, 1 ; <i32> [#uses=1]
+ volatile store i32 %Z, i32* @G
+ ret i32 %X
+}