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| author | Chris Lattner <sabre@nondot.org> | 2010-07-04 23:07:25 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-07-04 23:07:25 +0000 |
| commit | f172ecd964307a09f2412b38688ac71fd3c1b87d (patch) | |
| tree | 1cb4369845ee002bb22d9c72ca33f591881fbd9d /test/CodeGen/X86/v2f32.ll | |
| parent | e35d9842f73cb7273b1d0712183854f5f99fe24f (diff) | |
| download | llvm-f172ecd964307a09f2412b38688ac71fd3c1b87d.tar.gz llvm-f172ecd964307a09f2412b38688ac71fd3c1b87d.tar.bz2 llvm-f172ecd964307a09f2412b38688ac71fd3c1b87d.tar.xz | |
Just rip v2f32 support completely out of the X86 backend. In
the example in the testcase, we now generate:
_test1: ## @test1
movss 4(%esp), %xmm0
addss 8(%esp), %xmm0
movl 12(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
_test1: ## @test1
subl $20, %esp
movl 24(%esp), %eax
movq %mm0, (%esp)
movq %mm0, 8(%esp)
movss (%esp), %xmm0
addss 12(%esp), %xmm0
movss %xmm0, (%eax)
addl $20, %esp
ret
v2f32 support did not work reliably because most of the X86
backend didn't know it was legal. It was apparently only added
to support returning source-level v2f32 values in MMX registers
in x86-32 mode. If ABI compatibility is important on this
GCC-extended-vector type for some reason, then the frontend
should generate IR that returns v2i32 instead of v2f32. However,
we generally don't try very hard to be abi compatible on gcc
extended vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107601 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/v2f32.ll')
| -rw-r--r-- | test/CodeGen/X86/v2f32.ll | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/test/CodeGen/X86/v2f32.ll b/test/CodeGen/X86/v2f32.ll index 509d528e84..0b83ff81f4 100644 --- a/test/CodeGen/X86/v2f32.ll +++ b/test/CodeGen/X86/v2f32.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=0 -o - | FileCheck %s +; RUN: llc < %s -march=x86-64 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -march=x86 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32 ; PR7518 define void @test1(<2 x float> %Q, float *%P2) nounwind { @@ -8,9 +9,16 @@ define void @test1(<2 x float> %Q, float *%P2) nounwind { store float %c, float* %P2 ret void -; CHECK: test1: -; CHECK-NEXT: addss %xmm1, %xmm0 -; CHECK-NEXT: movss %xmm0, (%rdi) -; CHECK-NEXT: ret +; X64: test1: +; X64-NEXT: addss %xmm1, %xmm0 +; X64-NEXT: movss %xmm0, (%rdi) +; X64-NEXT: ret + +; X32: test1: +; X32-NEXT: movss 4(%esp), %xmm0 +; X32-NEXT: addss 8(%esp), %xmm0 +; X32-NEXT: movl 12(%esp), %eax +; X32-NEXT: movss %xmm0, (%eax) +; X32-NEXT: ret } |