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author | Evan Cheng <evan.cheng@apple.com> | 2008-05-29 08:22:04 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-29 08:22:04 +0000 |
commit | f26ffe987cf3643a7bd66bd9f97c34605ba7d08e (patch) | |
tree | 96ec60731614a458cd3ad8f59bd6f109d715e3f4 /test/CodeGen/X86/vec_insert-5.ll | |
parent | cd5e6dda7e91af662f378e43842e6d2d55ec3057 (diff) | |
download | llvm-f26ffe987cf3643a7bd66bd9f97c34605ba7d08e.tar.gz llvm-f26ffe987cf3643a7bd66bd9f97c34605ba7d08e.tar.bz2 llvm-f26ffe987cf3643a7bd66bd9f97c34605ba7d08e.tar.xz |
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_insert-5.ll')
-rw-r--r-- | test/CodeGen/X86/vec_insert-5.ll | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_insert-5.ll b/test/CodeGen/X86/vec_insert-5.ll new file mode 100644 index 0000000000..eaa523e6e5 --- /dev/null +++ b/test/CodeGen/X86/vec_insert-5.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllq | grep 32 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pslldq | grep 12 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psrldq | grep 8 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psrldq | grep 12 + +define void @t1(i32 %a, <1 x i64>* %P) nounwind { + %tmp12 = shl i32 %a, 12 + %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1 + %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0 + %tmp23 = bitcast <2 x i32> %tmp22 to <1 x i64> + store <1 x i64> %tmp23, <1 x i64>* %P + ret void +} + +define <4 x float> @t2(<4 x float>* %P) nounwind { + %tmp1 = load <4 x float>* %P + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 > + ret <4 x float> %tmp2 +} + +define <4 x float> @t3(<4 x float>* %P) nounwind { + %tmp1 = load <4 x float>* %P + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 > + ret <4 x float> %tmp2 +} + +define <4 x float> @t4(<4 x float>* %P) nounwind { + %tmp1 = load <4 x float>* %P + %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 > + ret <4 x float> %tmp2 +} |